msh@otc.otca.oz (Michael Homsey) (01/23/89)
I have two questions about this board, question 1 is more related to
multibus and question 2 about the memory on this board.
For those of you that do not know this board, it consists of the
32016 processor,
mmu,
fpu,
icu,
tcu.
Other items include
8255 intel PPI,
8253 intel PIT,
dual serial lines intel 8251A's
place for rom (for TDS or monitor)
128 Kbytes of dual ported dynamic ram.
Now the questions:
1) on the schematic (NSC number 870009735-001 E), sheet 9 where it details
the dynamic memories, it show 64k or 256k rams (giving it 128K or 512K
memory). Then there are various berg style jumpers. However, the refresh
counter XU54 (PAL 16R8A) has only 8 data lines, the 9th (RM8 is not
produced from it). Then, the address to local/external memory select is
done by XU93, (PAL 16L8A) which decides whether it is a local or
offboard request. (onboard memory is limited to 128k, the next byte
would start an offbord request.
My question, because of the pals used etc, to expand the memory on board
to 512Kbytes, would this require more than plugging in 256K chips? ie
would it involve changes to several pals? If so are this program
changes available. (NS support in OZ is well :-( .)
2) question two is related to the same board but, more towards what an
I/O operation on the multibus involves. (this board maps the I/O space
of the mulitbus (max 64K address) into a certain range of the memory
space of the 32016. I want to know whether the addressed I/O 'ports' can
be 16 bits wide. (I am working on a project where I am building hardware
and will be programming dma to do 16 bit transfers to memory, thats
fine. But I want to be able to read these 'ports' under CPU control. The
board is only addressed in I/O space(when slave device, but DMAs into
memory space (when Bus Master). I guess this question boils down to - is
it possible to do 16bit transfers in I/O space - period and is it
implimented on the DB32016A this way?
Michael Homsey msh@otc.oz{.au}
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