u5569462@ucsvc.unimelb.edu.au (DAVID CLUNIE) (02/10/89)
I am posting this to the newsgroup, as well as sending it to you
in case anyone else is masochistic enough to have an interest in
the Compupro NS32016 and the TDS Proms.
Ok. You wanted to know about PAL's for the Compupro S100 32016.
Now, bear in mind that it is literally years since I programmed a PAL, much
less did the job on the 32016, so I am doing this from the notes I have.
I got a bare bones 32016 board from Compupro, Revision B I think. It had a
32016 and an ICU on it. These I removed and replaced with more recent chips
from the Sytem development kit, (just in case) and put on the MMU and FPU as
well. I have not tested either of the later however.
Then I had to do the PAL.
The standard configuration for PAL U24 does the following:
- maps the onboard EPROM from FF0000h to FF7FFFh,
EXCEPT when BOOT* is asserted, when the EPROM appears EVERYWHERE
This BOOT* line is on after RESET until the 1st processor write.
The idea is that when the processor starts up the PC is cleared and
hence expects code at 000000h. The Compupro boot prom presumably then
does a write and expects succeeding code to execute from FF00XXh. This
is all very well but the TDS proms won't do this.
- maps the ICU to FFF800h to FFFFFFh
The ICU appears as 2k mapped multiple times across this range. This
prevents handling of NMI. We need to be able to distinguish between
location FFFE00h (normal INT*) and FFFF00 (NMI*).
- maps I/O to FE0000h to FFEFFFh (ie. S100 bus I/O)
Everything else is standard memory. The U24 PROM also controls how many wait
states to insert for each address range. Normally all those address ranges
specified above have 1 wait state, normal memory has 0.
How to make the TDS PROMS work ? Re-PAL U24. That is all.
- ignore the BOOT* pin entirely
- map the PROM to 000000h (simple ?)
- map the IO to C00000h where TDS IO goes
- skip the wait state for the ICU (I don't know why I did this)
- leave everything else alone
The effect of this is to create a system that will work. Providing you put
a serial port at the expected locations.
Something I included in my PAL was a solution to the NMI problem. Seeing as
the BOOT* pin was no longer used, I lifted the PAL pin and ran a jumper to a
convenient A8 pin somewhere. This gave me the CPU the ability to distinguish
location FFFE00h from FFFF00h. Note that I have not thoroughly tested this,
although it does not interefere with operation of the TDS PROMS.
Here is a rough draft of the PAL equations for U24 -
PAL 14L4
PAT 299B
CPU 32016 ADDR DECODE - TDS PROM IO C0 0000
A11 A14 A19 A18 A20 A17 A21 A13 A12 GND
A22 A15 A16 /IO /ICU /PROM /IOWAIT A8(used to be /BOOT) A23 VCC
PROM = /A23 * /A22 * /A21 * /A20 * /A19 * /A17 * /A16 * /A15
ICU = A23 * A22 * A21 * A20 * A19 * A18 * A17 * A16 * A15 *
A14 * A13 * A12 * A11 * /A8 (the last term if you have replaced BOOT)
IO = A23 * A22 * /A21 * /A20 * /A19 * /A18 * /A17 * /A16
IOWAIT = ( A23 * A22 * /A21 * /A20 * /A19 * /A18 * /A17 * /A16 )
+ ( /A23 * /A22 * /A21 * /A20 * /A19 * /A18 * /A17 * /A16 * /A15
So there you have it. Note that the equations have been retyped from notes
so they may not be in exactly the format PALASM expects them so be careful.
The TDS proms I have seem to be have like those on the DB1600A development
board. They expect the PROM to live from 000000h to 003FFFh as mapped by the
new PAL. They want RAM from 008000h upward. They expect the primary serial
port to live at C00000h (data) and C00002h (command) and be an 8251.
That should be enough to get you going. Remember that the 8251 data/command
bytes are read on word boundaries. I can't remember exactly how I dealt with
this on my S100 serial card, but I remember it was significant !
Oh yes. I jumpered the card as follows:
J1 A only - 2 waits on I/O else none
J2 solder - S100 NMI not MMU NMI (? significance of this ?)
J3 A,B - 6MHz
J4 B-C - MMU off
J5 A-C - MMU off
J6 removed - don't generate BOOT*
J7 solder - generate MWRT (ie. no IMSAI front panel (Yes I have one !))
J8 A-C - MMU off
J9 B-C - 128k Eproms
J10 A-C - 128k Eproms
J11 unsolder - A24 left unconnected
J12 unsolder - don't allow PHIDSB (Compupro specific TMA stuff)
The Prom numbered 2B goes on in the left hand socket (U11) and is the low byte.
(Guess who thought the other way round was intuitively correct and was wrong).
I hope that helps you to get it right first time. Needless to say I put a lot
of trial and error into this. The PAL worked first time though, so good luck ...
As far as getting disk controllers, TMA, etc. to work you are on you're own.
I did this originally because I liked the 32000 architecture so much I wanted
to write a C compiler for it. I got so wrapped up in compiler technology that
now I really don't care what the target is, so I never quite got around to doing
a 32016 code generator. One day when my retargetable code generator works I
might turn on the Compupro again. If my S100 power supply still works (it is
now more than 15 years old !).
Good luck. Don't hesitate to call ....
Regards ... David