skeller@xenna.Encore.COM (Shaun Keller) (02/15/90)
Errata for the book "Series 32000 Programmer's Reference Manual"
by Colin Hunter copyright 1987.
Shaun Keller
7 February 1990
These are things I noted while writing a 32k disassembler. I've divided
my comments into several categories. It would be nice if these came with
the book, perhaps as stickers for inside the front cover.
Just Plain Wrong
1. Page 6-202. Binary format shows ADDi where SUBi should be.
2. Page 6-61. Bit 15 in CMPST should be a 1 not a 0.
3. Page A-5. Under Register/Stack Manipulation missing entry for
BISPSRB and BISPSRW.
4. Page 5-7. Table 5-1. Access class regaddr only uses general purpose
registers not FPU registers. Remove the "Fn".
5. Page 6-135. Operand access class and length "write.i" should be moved
from "quick" to "gen".
Formatting Errors
1. Page 6-141. Move the dest and gen to line up with write.W for MOVXBW.
2. Page 5-5. Remove the underscore from "access_classes" second paragraph
line 3.
3. Page A-4. The entire second line beginning with "Supervisor Call" should
not be in bold face.
4. Page 6-106. Operand list for INSSi "offset, length" spacing should
look the same as that for EXTSi on page 6-90.
5. Page 6-63. Example for CMPSB is incorrectly formatted. "0E" should
be moved right to group with "04 00"
Suggestions for Improved Presentation
1. Several instructions contain short fields for what are really
special purpose opcode or operand bits. It is more useful to
replace these shorts with new special purpose field names. The
same is true for implied operands that are immediates. I suggest
the following names.
cond in Bcond Scondi
CMFI in SETCFG
mmureg in LMR SMR
procreg in LPRi SPRi
save-regs in ENTER SAVE
restore-regs in EXIT RESTORE
offset-length-byte in EXTSi INSSi
2. Page 5-26 (maybe elsewhere). Reg fields only specify general purpose
registers not FPU regs.
3. Page 5-20. Put the comment "Displacements are tagged with length bits."
under the description of absolute mode.
4. Page 2-34. Say that gen immediates can only have lengths B, W, D, F, or
L because all other possible encodings exclude the immediate address mode
(e.g., 2i is always access class rmw).
5. Should update everything to show the differences between the 032, 332, and
532. This is especially needed for those instructions that access special
registers like LMR, SMR, and LPRi and SPRi.
6. If for Bcond and Scondi you can use 14 and 15 in the cond field for
unconditionally true (shadowed by BR) and unconditionally false, then
add UT and UF to the cond tables for these instructions.reuven@nsc.nsc.com (Reuven Marko) (02/15/90)
In article <11154@encore.Encore.COM> skeller@xenna.UUCP (Shaun Keller) writes: >Errata for the book "Series 32000 Programmer's Reference Manual" >by Colin Hunter copyright 1987. > >Shaun Keller >7 February 1990 > > >These are things I noted while writing a 32k disassembler. I've divided >my comments into several categories. It would be nice if these came with >the book, perhaps as stickers for inside the front cover. > > Thanks to Shaun for pointing these out. We are currently working on an updated version of the Programmer's Reference Manual. It will be published later this year, in the summer. I shall be glad to recieve any additional remarks so that we can come up with a better manual. -- Reuven Marko (408) 721-7928 National Semiconductor reuven@nsc.nsc.com
mollers.pad@nixpbe.uucp (Moellers) (02/19/90)
skeller@xenna.Encore.COM (Shaun Keller) writes: >Errata for the book "Series 32000 Programmer's Reference Manual" >by Colin Hunter copyright 1987. Sounds interesting, can someone give me an ISBN? Josef Moellers | c/o Nixdorf Computer AG USA: uunet!philabs!linus!nixbur!mollers.pad | Abt. DX-PC !USA: mcvax!unido!nixpbe!mollers.pad | Pontanusstr Phone: (+49) 5251 146245 | D-4790 Paderborn
dlr@daver.bungi.com (Dave Rand) (02/20/90)
In article <1273@nixpbe.UUCP> mollers.pad@nixpbe.uucp (Moellers) writes: >skeller@xenna.Encore.COM (Shaun Keller) writes: > >>Errata for the book "Series 32000 Programmer's Reference Manual" >>by Colin Hunter copyright 1987. > >Sounds interesting, can someone give me an ISBN? > ISBN: 0-13-806936-0 Published by Prentice-Hall Quite a good book, all up. The original Programmer's manual (no ISBN, not published any more) did contain some information wrt bit pointers which is not in this manual. -- Dave Rand {pyramid|hoptoad|sun|vsi1}!daver!dlr Internet: dlr@daver.bungi.com
david@marvin.jpl.oz (David Magnay) (02/23/90)
Errata: Each instruction description lists the valid forms at the top of the page. A number are missing one or more forms. eg p6-141, missing MOVXBW Try writing a lexical description file from the book !. HARD, as our friend has explained. Can we get execution times for different CPU's in here. NSC seem to treat these like the state secrets. Motorola have published theirs for years on Day 1, with helpful forms giving good estimates for average, min and max times to execute. You need as BSc and a 32 bit calculator to work them for the 32k. Else, the source for an estimator program would be useful. ( file.s -> file.t ) Need improving: Descriptions of descriptors in intrpt vector table. A version of the diagram Fig 4-5, p4-12 for vectored intrpts. The desciptions of instruction operations are not always clear, or cover all instruction forms in an unambiguous way. Have wasted much time trying to clarify meanings. Suggest you use some pseudo-code grammatical descriptions, as is usual in books like this. eg (ea) -> rn (ar++) or (SP) -> PC; SP += 4; Better description of the Syntax line explanation. ( line 2 & 3 in following eg). eg Syntax CMPMi block1, block2, length gen gen disp addr addr For a good example to follow, see MC68030, Enhanced 32 bit Microprocessor Users manual, 2nd edition Prentice Hall, 1989 ISBN 0-13-566951-0 See if we can do better than that.