[comp.sys.nsc.32k] FYI, forwarded from comp.arch

jkh@meepmeep.pcs.com (Jordan K. Hubbard) (05/27/90)

This posting is on behalf of Johann Ruegg (uunet!dunike!onecom!hans).
Please send all replies directly to him and NOT to me.
  --mj
  mj@myrias.com
>>>>>>>>>>>>>>>>>>>>>>>>>> cut here >>>>>>>>>>>>>>>>>>>>>>

There has been some recent speculation about the history of National's
32000 chip.  We did the official AT&T Unix port for National way back
when, so we thought we'd add our 2 cents worth.

At the time, AT&T contracted with Zilog, Intel, Motorola and National to
do official ports of UNIX.  The porting base was still the VAX and AT&T
Unix still did swapping (no paging).  Each chip maker typically contracted
with a Unix house to do the port.  National originally had a deal with HCR
for their port.  We were working for Burroughs at the time, and they had
a project (since canceled :-( ) which was going to use the National CPU,
so we basically volunteered to do a parallel port for free.

National already had a box running their Berkeley port.  The box was 
called the SYS16 (later re-named SYS32) and their Berkeley port was
called Genix.  Anyway, we already had a fairly stable hardware design
and we decided to use Genix as our host system.  Joe Treat did a
pcc compiler port and a new assembler.  Johann Ruegg did the kernel
porting work.

First, we both agree that the National architecture was superb for
Unix.  The addressing modes and orthagonality of the instruction set
worked out well for the compiler port.  Also, VAX byte order was a
plus since the VAX was our porting base.  The MMU architecture and
trap system worked out well also.  Unix changed from swapping to
its first paging version during the work and we were able to add
paging in 6 weeks!  The National MMU was actually cleaner than the
VAX since it had Modify and Access bits.

One mistake National did make with the architecture was the idea of
modules and external references which went through the module tables.
This let you link to ROM code easily.  The Genix compiler actually
used this for C, but it was so slow that we took it out for the PCC
port.  (I believe National also abandoned it later for Genix).

Also, like other 2 address architectures, the 32000 had the following
problem with instructions which are not commutative (sub, div, shift):

	a = a - 3;

can be coded as "sub $3,r4" if a is in 'r4' but

	a = 3 - a;

cannot be coded in one instruction.  What you really need is another
version of 'sub' that does "dest = src - dest" in addition to
"dest = dest - src".  Does anyone know of a commercial 2 address machine
which provides both?

There were still a few chip bugs however.  Two in particular caused
problems:

	1) Divide didn't always give the correct result.  This was
fixed in the next rev.  What was amazing was that the Genix people hadn't
found this bug previously.  Perhaps because National was still using
VAX's as their host machines internally, while we were using our port.

	2) Page table entries that were marked as modified but were not
writable didn't work right.  Writes trapped in such a situation, but
AFTER the write was already done.  The workaround was to use a different
bit to mark pages which were modified.

Despite these problems, our UNIX port was done long before the other
chip vender's ports and was the only one to include paging.  We spent
our extra time debugging AT&T's Unix validation test suite.  This
was partially due to our brilliance ( :-> ), but mainly due to the
niceness of the architecture.  (We also beat out HCR and were picked
as the port even though HCR had a 3 month head start).

Johann is currently working on the i860 port with Intel.  This is
also a good architecture for UNIX (though not perfect), but it too
has had significant chip bugs.  The major ones have already been fixed -
perhaps quicker than National?  It may however suffer the same fate as
National - being a little too late for its market.  We will see.


	Johann Ruegg  uunet!dunike!onecom!wldrdg!hans
	Joseph Treat  uunet!dunike!onecom!wldrdg!joe