des@musashi.wpd.sgi.com (Des Young) (05/03/90)
Here are two files: shar.c, and crc.c. The crc's of them are:
64698 3843 crc.c
17812 1436 shar.c
------------------------ snip, snip, snip --------------------
echo Wrapped by des, on musashi
echo x - crc.c
sed '/^X/s///' > crc.c << '/'
X/* Compute checksum Author: Johan W. Stevenson */
X
X#include <stdio.h>
X
Xint errs;
X
Xmain(argc, argv)
Xchar **argv;
X{
X char line[256];
X
X if (argc <= 1)
X crc((char *) 0);
X else if (argc == 2 && strcmp(argv[1], "-") == 0)
X while (fgets(line, sizeof line, stdin) != NULL) {
X if (line[strlen(line) - 1] = '\n')
X line[strlen(line) - 1] = '\0';
X crc(line);
X }
X else
X do {
X crc(argv[1]);
X argv++;
X argc--;
X } while (argc > 1);
X exit(errs != 0);
X}
X
X/* Crctab calculated by Mark G. Mendel, Network Systems Corporation */
Xstatic unsigned short crctab[256] = {
X 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
X 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
X 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
X 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
X 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
X 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
X 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
X 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
X 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
X 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
X 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
X 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
X 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
X 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
X 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
X 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
X 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
X 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
X 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
X 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
X 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
X 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
X 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
X 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
X 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
X 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
X 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
X 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
X 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
X 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
X 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
X 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
X};
X
X/* Updcrc macro derived from article Copyright (C) 1986 Stephen Satchell.
X * NOTE: First argument must be in range 0 to 255.
X * Second argument is referenced twice.
X *
X * Programmers may incorporate any or all code into their programs,
X * giving proper credit within the source. Publication of the
X * source routines is permitted so long as proper credit is given
X * to Stephen Satchell, Satchell Evaluations and Chuck Forsberg,
X * Omen Technology.
X */
X
X#define updcrc(cp, crc) ( crctab[((crc >> 8) & 255)] ^ (crc << 8) ^ cp)
X
Xcrc(fname)
Xchar *fname;
X{
X register int c;
X register int i;
X register long len = 0;
X register unsigned short crc = 0;
X register FILE *fp;
X
X if (fname == NULL)
X fp = stdin;
X else if ((fp = fopen(fname, "r")) == NULL) {
X fprintf(stderr, "crc: cannot open %s\n", fname);
X errs++;
X return;
X }
X while ((c = getc(fp)) != EOF) {
X len++;
X crc = updcrc(c, crc);
X }
X printf("%05u %6ld", crc, len);
X if (fname) {
X printf(" %s", fname);
X fclose(fp);
X }
X printf("\n");
X}
/
echo x - shar.c
sed '/^X/s///' > shar.c << '/'
X/* shar --
X * make a shell archive Author: Michiel Husijes
X * Modified to compile on SGI m/c Des Young (DWLY)
X */
X
X#include <sys/types.h>
X#include <sys/param.h>
X#include <fcntl.h>
X#include <stdio.h>
X
X#define IO_SIZE (10 * BUFSIZ)
X
Xchar input[IO_SIZE];
Xchar output[IO_SIZE];
Xint ind = 0;
X
Xmain(argc, argv)
Xint argc;
Xregister char *argv[];
X{
X register int i;
X int namelen;
X char *user;
X char hostname[MAXHOSTNAMELEN];
X static char userstring[] = "USER";
X int fd;
X extern char *getenv();
X
X user = getenv(userstring);
X gethostname(hostname,MAXHOSTNAMELEN);
X printf("echo Wrapped by %s, on %s\n",user,hostname);
X for (i = 1; i < argc; i++) {
X if ((fd = open(argv[i], O_RDONLY)) < 0) {
X write(2, "Cannot open ", 12);
X write(2, argv[i], strlen(argv[i]));
X write(2, ".\n", 2);
X } else {
X print("echo x - ");
X print(argv[i]);
X print("\nsed '/^X/s///' > ");
X print(argv[i]);
X print(" << '/'\n");
X cat(fd);
X }
X }
X if (ind) write(1, output, ind);
X exit(0);
X}
X
Xcat(fd)
Xint fd;
X{
X static char *current, *last;
X register int r = 0;
X register char *cur_pos = current;
X
X putchar('X');
X for (;;) {
X if (cur_pos == last) {
X if ((r = read(fd, input, IO_SIZE)) <= 0) break;
X last = &input[r];
X cur_pos = input;
X }
X putchar(*cur_pos);
X if (*cur_pos++ == '\n' && cur_pos != last) putchar('X');
X }
X print("/\n");
X (void) close(fd);
X current = cur_pos;
X}
X
Xprint(str)
Xregister char *str;
X{
X while (*str) putchar(*str++);
X}
/
--
trademarks abound, usual disclaimers apply, opinions are mine
des@pei.com Des Young (415) 335-1888
Protocol Engines Inc., Mountain View, CAvonb@iitmax.iit.edu (bob von borstel) (05/05/90)
Dave - Got my 532 board today! Nicely done, congrats are in order. I have another ? that you can answer. When talking to my NS distributor, he found 2 versions of the 32381 fpu, a u and a v version. I assume I want the u version, but can you tell me what the difference is? When I purchase the 532/381 parts, since they are $$$, and the cost differential between 25mhz and 30mhz isn't too extreme, is it possible to buy the 30mhz parts, and drive the board at 25mhz, and then 'maybe' later down the road, replace the 50mhz crystal with 60mhz, or are your design tolerances strictly 25mhz? thanx.
dlr@daver.bungi.com (Dave Rand) (05/05/90)
[In the message entitled "Gatewayed mail message" on May 4, 12:44, bob von borstel writes:] > I have another ? that you can answer. When talking to my NS distributor, > he found 2 versions of the 32381 fpu, a u and a v version. I assume I want > the u version, but can you tell me what the difference is? The U version is in a ceramic package, and is a PGA (Pin Grid Array). The V version is in a plastic package, and is a PLCC. You _should_ be able to use the V version. It is significantly less expensive. We have ordered a couple to try from the local NS field office here, but they have been quite slow in getting them to us. I suspect that they may not be in full production yet. As soon as we get one working, we will let you know. BTW - steve.ligett@mac.dartmouth.edu is putting together parts kits for those that want them. By purchasing in volume, the prices will be better than you can get on your own - this includes the CPU/FPU/ICU. > When I purchase the 532/381 parts, since they are $$$, and the cost > differential between 25mhz and 30mhz isn't too extreme, is it possible > to buy the 30mhz parts, and drive the board at 25mhz, and then 'maybe' > later down the road, replace the 50mhz crystal with 60mhz, or are your > design tolerances strictly 25mhz? You are welcome to try this. The design is for 25 Mhz, and every nanosecond counts. Really. 25 Mhz is a realistic operating frequency, and is picked for the optimal balance between memory wait states and system performance. Going to 30 Mhz would really require another wait state on the memory - reducing memory bandwidth by 33% (3 clocks instead of 2). Right now, we get 50 megabytes per second at 25 Mhz - at 30, it would be 40 meg/sec. While the caches on the 532 help, a 10 meg/sec loss in memory bandwidth would hurt! (The 32016 has a 4 meg/sec bandwidth, the 32032 an 8 meg/sec). If you do try to push to 30 Mhz without re-doing the memory timing, you will need to carefully evaluate the worst case paths, and increase the speed of the PALs and memory devices to match. George has posted on this topic in the past, let me see... <rummage, rummage, shuffle> Ah HA! <From pcdig13> In-Reply-To: Dave Mason's message on Dec 12, 15:45. X-Mailer: Mail User's Shell (6.2 5/11/88) To: pc532@daver.UU.NET Subject: Re: FPU Message-Id: <8912122348.AA23965@wombat.UUCP> Date: 12 Dec 89 23:48:24 PST (Tue) From: george@wombat.UUCP (George Scolaro) Status: OR > Could the board be run at 30MHz with faster DRAMs? I just looked and > 70ns rams are about 30% more expensive than 80ns. George's BOM says > 85ns rams, so if you boosted the clock to 30MHz 70ns rams should > work.... ??? Would there be any advantages (or would it even be > possible) to run the processor at 30MHz with wait states for the > memory? No, I'm afraid not. The design is very balanced to 25mhz, achieving the 0 wait state read/write on first access & 1 wait state in burst is very tight. The worst case margin is a couple of nanoseconds in the critical paths. Pushing to 30mhz would increase the number of wait states, definitely 1 on read/write and probably 2 during the burst. The performance gained by running at 30mhz would be mostly lost via the wait states. The 10 mips sustained at 30mhz is for zero wait states, and experimenting has shown that each wait state costs you 7% or more. Dhrystone can show up to a 20% hit per wait state. Besides, the cost of the 32532+381 would definitely be a lot higher at 30mhz, since you would then be paying for 'el primo parts. Note we are still hoping that NS will do a good deal with us, and this would probably be the case on the volume parts not their top of the line stuff. Dhrystone 2.1 gets 10869 on this board, note this isn't version 1.1 which [note: current pc532 is 11111 due to optimized pals <dlr>] gave much higher values (due to cheating optimizing compilers). Our 25mhz compaq 386's (with 64k cache) get around 6-7000 dhrystones. Note: Dhrystone is very very memory bandwidth sensitive, this is where wait states really hurt performance a lot. Note some more numbers to place the pc532 with regard to other systems: Cray 2 gets 9375 - 13043 (new compiler) Aeon (532) 9998 Encore (532) 11117 - 11223 Sun 4/280 10889 Vax 8700 10791 - 11082 Amdahl 5990-700 gets 91463/cpu > 15 MIPS peak/ 10 MIPS sustained makes a good thing (pc532) sound even > better.... but maybe I'm just getting greedy. Actually, I just want Yes you definitely are, but then we all are. We jiggled the design for a long time (I started designing the pc532 last year around April and had a wirewrap prototype running around June or so of '88), so the choice of 25mhz is based on a lot of design tradeoffs. Besides, you wouldn't really notice a 20% (less the wait state loss) performance difference, it would be like comparing an 8mhz 286 to a 10mhz 286. If you want to try and push to 30mhz, you can change the pal equations, get faster memory, get faster NS parts and use 7.5 ns PALs and it might all work (I'll leave this as an exercise for the interested reader...), but I'm happy to let it sit at 25mhz, the parts are a lot cheaper! > BTW, I don't think I've said it yet, but definitely count me in for 2 > boards (plus associated PALs/PLAs and EPROMs). Early February > delivery time is fine. Fine, you're on the list. Note: 1 nanosecond is a short piece of wire. best regards, -- George Scolaro george@wombat (try {pyramid|sun|vsi1|killer} !daver!wombat!george) [37 20 51 N / 122 03 07 W] -- Dave Rand {pyramid|hoptoad|sun|vsi1}!daver!dlr Internet: dlr@daver.bungi.com
vonb@iitmax.iit.edu (bob von borstel) (05/05/90)
okay on the pga/plcc 32381 explanation. The primary reason I was asking about the 30mhz/25mhz 532 part, was that I have a couple of the 532 designer kits from National, and aside from some of the other parts that aren't pertinent to this board, the 532 is a 30mhz part. so....i assume driving the 30mhz 532 at 25 mhz is okay. I know some ic designers (motorola) for example have minimum timing requirements when you want to drive a fast chip slower (88k). Don't have the specs on the 532 driving.
gs@vw25.chips.com (George Scolaro) (05/05/90)
[In the message entitled "Gatewayed mail message" on May 4, 17:53, bob von borstel writes:] > so....i assume driving the 30mhz 532 at 25 mhz is okay. > I know some ic designers (motorola) for example have minimum timing requirements > when you want to drive a fast chip slower (88k). Don't have the specs on > the 532 driving. No problem. The 532 minimum clock speed is 10 MHz. Since 30Mhz, 25MHz and 20MHz speeds are all the same part - just graded for speed, you can certainly run a 30MHz part at 25MHz (or slower). best regards, -- George Scolaro (gs@vw25.chips.com) Chips & Technologies +1 408/434-0600 X4556 work 3050 Zanker Road San Jose, CA 95134
Roberto_bobitaly_Biancardi@cup.portal.com (06/30/90)
from Subject: Please unsubsribe me from pc532 mail list Lines: 2 Date: Fri, 29 Jun 90 16:27:22 PDT Message-Id: <9006291627.1.1011@cup.portal.com> X-Origin: The Portal System (TM) X-Possible-Reply-Path: Roberto_bobitaly_Biancardi@cup.portal.com X-Possible-Reply-Path: sun!portal!cup.portal.com!Roberto_bobitaly_Biancardi Please dont send me more mail about 532. Thanks. I'am roberto_bobitaly_biancardi@portal.com
Uuunet (UUNET) (07/02/90)
.us>; from "Jon Buller" at Jun 29, 90 7:31 am X-Mailer: ELM [version 2.3 PL0] My 2c is as follows: > Well, now that the pc532 parts kits are headed all over the world from > the NorthEast... (BIG round of applause for Steve) Has anyone given YAY! (sound of clapping) > I have also thought some people from comp.sys.mac might want to get in > on this for their Mac II's (but then we are restricted to 5 inch half > height or 3.25" drives (if we want to include the IIc? and SE* people). Hm... How about we limit our choices to only full-height 5" or 8" or bigger drives.
root (Admin) (07/11/90)
questions
as I assemble my board.
1) The resistor Sips - normally orientation is important, but since each
sip has 4 identical resistors, does it matter? Should the dot on the
pak be oriented with the arrow on the board?
2) The 20 and 50mhz crystals - Do they get soldered on the board, or
should there be sockets like the board mask shows?
3) The 3 diodes, the arrow on the board, matches the black tail
end of each diode for direction?
4) The 4 leds, is the short leg the positive lead or the long one?
5) These 50 odd same tantalum capacitors, no orientation right?
(A5E104M, top 931ZC bottom), yet why does George's diagram show
+v on left, vertical +v towards bottom?
All help would be appreciated
Bob (heathkit) Von BorstelFELLOWS@UNB.CA (07/12/90)
On Wed, 11 Jul 90 12:32:00 EDT Bob Von Borstel writes: > questions > as I assemble my board. > > 1) The resistor Sips - normally orientation is important, but since > each sip has 4 identical resistors, does it matter? Should the dot on > the pak be oriented with the arrow on the board? I oriented mine. > > 2) The 20 and 50mhz crystals - Do they get soldered on the board, or > should there be sockets like the board mask shows? I believe Steve Ligget included sockets for the crystals. > > 3) The 3 diodes, the arrow on the board, matches the black tail > end of each diode for direction? > The one diode I have I installed thus: --|<|-- Black band on this end ^ I checked the circuit diagram & the diode resistances & think I got it right. > 4) The 4 leds, is the short leg the positive lead or the long one? Don't know, don't have leds yet. > > 5) These 50 odd same tantalum capacitors, no orientation right? > (A5E104M, top 931ZC bottom), yet why does George's diagram show > +v on left, vertical +v towards bottom? > The rectangular capacitors you refer to are not tantulum. They do not have polarity. The tantulum cappacitors that Steve Ligget supplied are yellowish blobs. They have their polarity printed on them (you need a magnifying glass toread it). There are two voltage ratings too. The 25v ones go across the +-12v supply lines (on right edge & bottom ed edge of the board. The 16 ones go across the 5v lines. The silkscreening on the board does not show which capacitors are tantulum & which are not. Refer to the drawing for that info. Hope this: a)helps b)is correct. Dave Fellows > All help would be appreciated > Bob (heathkit) Von Borstel
dlr@daver.bungi.com (Dave Rand) (07/12/90)
[In the message entitled "Gatewayed mail message" on Jul 11, 9:32, Admin writes:] > questions > as I assemble my board. > > 1) The resistor Sips - normally orientation is important, but since each > sip has 4 identical resistors, does it matter? Should the dot on the > pak be oriented with the arrow on the board? Yes > > 2) The 20 and 50mhz crystals - Do they get soldered on the board, or > should there be sockets like the board mask shows? I would suggest sockets. They are not required, but would be really nice! > > 3) The 3 diodes, the arrow on the board, matches the black tail > end of each diode for direction? Board: ->|- Diode: -------[ |]-------- > > 4) The 4 leds, is the short leg the positive lead or the long one? No way to know for sure. Measure it... > > 5) These 50 odd same tantalum capacitors, no orientation right? > (A5E104M, top 931ZC bottom), yet why does George's diagram show > +v on left, vertical +v towards bottom? Wrong. Tantalums are (very) orientation sensitive. They will explode if connected wrong (although not instantly). The monolithic bypass caps, on the other hand, are not orientation sensitive. > > All help would be appreciated > Bob (heathkit) Von Borstel -- Dave Rand {pyramid|mips|sun|vsi1}!daver!dlr Internet: dlr@daver.bungi.com
khe@meepmeep.pcs.com (Eckmeier Karlheinz) (01/24/91)
Subject: Hurray, it's alive Finally my board came to life today. It's the third one here in Germany. Thanks to everybody who helped, Jordan and Garry in particular. Karlheinz -- Karlheinz Eckmeier | UUCP: khe@meepmeep.pcs.com PCS Computer Systeme GmbH | pyramid!pcsbst!khe 8000 Muenchen 90, Germany | EUNET: unido!pcsbst!khe
stacey@guug.de (04/04/91)
To: pc532@daver.bungi.com Subject: Tool offered to rename/link PC532 News/Mail files by date and sender. From: stacey@guug.de (Julian Stacey) - Tool available to help order & thus reduce directories containing duplicate PC532 news & mail articles, contained by files with unhelpful names. - Probably multiple articles are prevalent among those PC532 people enrolled both on the pc532 mailing list, & on news/comp.sys.nsc.32k. - C Source is 6K (tabbed), pre nroff manual 4.7K. - I won't mail or include it here unsolicited. - To get a copy, ask me to either mail or sendnews, or offer yourself as an ftp archive site. Brief Summary of `name_date.c' - Sorts files containing mail & news articles, renaming to date sent + sender. - Removes the randomising effect of each individual receiving news host's /usr/spool/news/ article received number, &/or mail received order. - Assists easier comparison/reference to articles received by other mail/news hosts. - Assists preening or merging article collections. Julian Stacey stacey@guug.de
stacey@guug.de (04/04/91)
To: pc532@daver.bungi.com Subject: PC532 RS232/V24 Serial Ports are DTE, (DCE is normal for a host). From: stacey@guug.de (Julian Stacey) You could skip this article if: - Your PC532 is already serially communicating & - You are not interested in DTE/DCE configuration & - You are not interested in IDC header pin layout for serial ports on the PC532 or new add-on PCBs. The PC532 breaches normal convention, it should have been configured DCE ! To quote the PC532 Functional Spec. Rev. 1.04 11/14/90 Page 4 Line 9: > Each serial channel connects to a 10 pin header which may be connected > (via a transition connector and cable) 1:1 to a DB9 connector > (IBM PC/AT pin compatible). This means: - PC532 Serial Ports connected from the 10 pin IDC header by ribbon to 9 pin IDC D connectors have a DTE configuration, just like a PC-AT, but unlike normal multiple serial port host computers. - You can't just connect the ribbon to a terminal (or PC-AT with terminal emulator) and start debugging your new PC532, abnormally for connecting a computer to a terminal, you need to add a crossover cable (= `null modem'). To Rewire the PC532 from DTE to DCE: Split the ribbons at the D ends, & change to solder type 9 or 25 pin D cons. 10 PIN IDC UART RS232/V24 9 PIN D 25 PIN D PCB HEADER SIGNAL SIGNAL NAME SOCKET SOCKET ------------------------------------------------------------------------- 1 DCD DTR 4 20 3 RXD TD 3 2 4 RTS CTS 8 5 5 TXD RD 2 3 6 CTS RTS 7 4 7 DTR DCD (+DSR) 1 8 + 6 9 GND SG 5 7 PCB Pins 2,8,10 unused as before. I use 25 pin D's so that column is proven, but I applied the same logic to generate the 9 pin column. Why was the PC532 IDC configured as DTE ? possibilities include : - You can take ribbons straight from the PCB to modems. Remember multiple modem connection inspired the original PC532 design. - Maybe the PC/AT configuration was taken as `standard' for a host computer, but it's not, it has a screen that can run a terminal emulator, has just one or two ports normally, & is often connected via modem to a remote mainframe. Perhaps thats why IBM configured the PC/AT port as a DTE. - Laying out a PCB, it's easy to forget that the signal from the UART, via IDC,ribbon & D connector, that is called RD on the UART, actually needs to be connected to the pin known as TD on the D connector, to configure the D connector on the back of the box as DCE. You should also relabel all 4 RSTB (Pin 14) as RTSB on circuit sheets 6 & 7. I too would like to offer my compliments and thanks, both to George Scolaro for the hardware design, and all the other contributors who've paved the way up to (& hopefully beyond?) Minix. Abbrevs. used: DTE = Data Terminating Equipment (VDU/VDT/Terminal/Printer) DCE = Data Communicating Equipment (modems, & multiple port host computers) IDC = Insulation Displacement Connector Julian Stacey stacey@guug.de
george@wombat.bungi.COM (George Scolaro) (04/04/91)
[In the message entitled "Gatewayed mail message" on Apr 4, 14:01, stacey@guug.de writes:] > > To: pc532@daver.bungi.com > Subject: PC532 RS232/V24 Serial Ports are DTE, (DCE is normal for a host). > From: stacey@guug.de (Julian Stacey) > > > To quote the PC532 Functional Spec. Rev. 1.04 11/14/90 Page 4 Line 9: > > Each serial channel connects to a 10 pin header which may be connected > > (via a transition connector and cable) 1:1 to a DB9 connector > > (IBM PC/AT pin compatible). > > > Why was the PC532 IDC configured as DTE ? possibilities include : > - You can take ribbons straight from the PCB to modems. Remember multiple > modem connection inspired the original PC532 design. > - Maybe the PC/AT configuration was taken as `standard' for a host computer, > but it's not, it has a screen that can run a terminal emulator, has just > one or two ports normally, & is often connected via modem to a remote > mainframe. Perhaps thats why IBM configured the PC/AT port as a DTE. Of course it was wired to be compatible with PC/AT configurations. That way all null modem connectors etc etc from 9 pin to 25 pin would work. It may not be a real standard but I bet with the number of PC/AT's out there it certainly is an industry standard... In addition any PC/AT add on like a mouse etc will just plug in - most cheap peripherals are PC/AT compatible or have the appropriate cables/connectors to be so. If you hate PC/AT's or don't own any, then of course the PC532 configuration wouldn't make sense. And yes, its planned use is for heaps of modems... And yes, I took a lot of care to get the mapping from IDC to DB9 correct (for AT compatibility). Thanks for the DTE-DCE mapping info, I'm sure it will help lots of folks that aren't conversant with RS232 hook ups. best regards, -- George Scolaro george@wombat.bungi.com [37 20 51 N / 122 03 07 W]
ian@sibyl.eleceng.ua.OZ (Ian Dall) (04/06/91)
In article <9104041201.AA01629@guug.guug.de> stacey@guug.de writes: >To: pc532@daver.bungi.com >Subject: PC532 RS232/V24 Serial Ports are DTE, (DCE is normal for a host). >From: stacey@guug.de (Julian Stacey) > >The PC532 breaches normal convention, it should have been configured DCE ! >Why was the PC532 IDC configured as DTE ? >Abbrevs. used: > DTE = Data Terminating Equipment (VDU/VDT/Terminal/Printer) > DCE = Data Communicating Equipment (modems, & multiple port host computers) Actually, DTE is correct. Computers, regardless of the number of ports are DTE. This is because RS 232 assumes you will always communicate with some modem. Thus the "classic" RS 232 situation is VDU======Modem--------Modem=====CPU (DTE) (DCE) (DCE) (DTE) This is why the term "null modem" is used for a crossover which lets two DTE ports talk to each other. Now to confuse the issue, some computer manufacturers said "most ports are not connected to a modem, so lets make it easier for people by wiring our ports DCE". This is *not* correct. Also some VDU manufacturers said "most VDUs are not used via a modem, so lets make it easier for people by wiring our ports DCE". This also is *not* correct. Of course, for devices which don't fit into any of the classifications VDU, Modem, or CPU, the correct choice is uncertain. This, when combined with the variety of flow control implimentations and connector sexual compatability issues makes RS 232 a crock of shit. However, it is not going to go away now and it is correct for the PC 532 ports to be DTE. -- Ian Dall I'm not into isms, but hedonism is the most harmless I can think of. -- Phillip Adams ACSnet: ian@sibyl.eleceng.ua.oz internet: ian@sibyl.eleceng.ua.oz.au