[comp.sys.atari.8bit] HELP! 256K memory upgrade

store2@ihuxi.UUCP (04/09/87)

HELP!!!
I have a 600XL that I modified with a 256K memory upgrade that was compatible
with the memory upgrade published in BYTE. I have now decided to modify the
circuit to make the memory upgrade compatible with the 130XE. I have modified
my circuit based on information published in Antic (Feb. 1987) on how the bank
switching of memory works in the 130XE. My modification appears to work fine
with the software published in this issue of Antic, but does not work with
the ramdisk driver in Sparta Dos. The following are the definitions of the
bits in PORTB and signals used by my circuit.

PORTB Bits
       PB2 & PB3 - determine which 16K bank of 4 is used in extended memory
                   mode
             PB4 - extend memory mode bit for CPU (when low CPU is in extended
                   memory mode)
             PB5 - extend memory mode bit for ANTIC (when low ANTIC is in
                   extended memory mode)
             PB6 - unused
 PB0 & PB1 & PB7 - used to bank switch between ram and basic/os/fp rom

Signals used
            HALT - when low ANTIC accesses memory, when high CPU accesses
                   memory
             MUX - this is the select lead between the ras address (when
                   low) and the cas address (when high)
     A15 & A14 & - address bits used (a0 & a7 are for the ras address,
         A0 & A7   a15 & a14 are for cas address and decoding bank switched
                   area in memory)

My questions are:

    Does anybody see a missing registered bit or signal that needs to be
        added to this list?

    Is there a better source of information on the details of using the
        memory bank switching capabilities of the 130XE?

    What other registered bits do the other 256K 130XE compatible upgrades
        use to get to the additional 128K of memory?


						Wayne Wilcox
						AT&T-ISL
						1100 E. Warrenville Rd.
						Naperville, IL 60566
						...!ihnp4!ihuxi!store2