Cothrell@DOCKMASTER.ARPA (09/22/87)
Mike B. (this is being sent to two accounts, Dflint02 at ulkyvx.bitnet and cl150652 at ulkyvm.bitnet) I sent something similar to this out to info-atari8, so if you've seen it, read it anyway. (just kidding). I used the circuitry from the 800 tech ref book to do the tri-stating. I have it working as of yesterday(20th) for the 6502(standard). It does not work with the 65C802 (802), I think due to the fact that the 800 "halts" the 6502 by stretching the phase 0 clock at a logic 0 level. I don't know wether you caught it or not, but the 800 did not use the phase 1 and 2 clocks generated by the 6502...instead, a 7474 was used to generate the system clocks externally(so when the phase 0 clock was stretched, it would not affect the rest of the system). Anyway, the '802 cannot be "halted" by stretching the phase 0 clock low...it has a maximum low time of 10 uS and a max high time of infinity--just about opposite of the standard 6502. For that matter, the 65C01 and 65C02 have the same problem. I have tried several ways of stretching the phase 0 clock at a logic 1 level, but to no avail, I think it throws the internal timing of the cpu off. I might be able to make it work if I design a bit of circuitry, which is what I am thinking about now, but am not having any luck(plus I need a proto-board to do all this on...wire-wrap is a bitch). about increasing the speed...been thinking about that too. My data book (ala Synertek, 1983) shows 6502 available to 4 Mhz, 6520 to 2Mhz. In looking at the 800 schematics, it has occurred to me that the board I have built is the first step to building a faster processor. My reasoning is as follows: We want to speed up the CPU without affecting the rest of the circuits(ANTIC, GTIA, etc), so we will have to generate the system clocks(Ph1 & Ph2) off of the CPU. Next, we have to be able to stop the processor for ANTIC DMA. To stop the processor, in sync with the ANTIC, we need use the "halt" signal of the ANTIC and have some relationship between the ANTIC's master Ph0 and the CPU's Ph0. Next, the system clocks Ph1 and Ph2 have to have "two speeds", one fast speed for the CPU to do memory access, and a slow speed for the ANTIC etc... . What I have in mind(warped as it is) is using the Antic Ph0 as a trigger to what I call a clock doubler, which will produce 2 Ph0 clock cycles for each Antic Ph0 pulse. The doubled clock is basically the CPU Ph0. For the system clocks, the best Idea I have right now is to run a 7474 (ala 800) at the doubled speed, providing the fast system clocks, and putting a divide by two circuit in to make the ANTIC and GTIA slow system clocks. The problem that I haven't got a solution for is the actual memory accesses...how to have both fast and slow access...I think I need a 6502 wait state??? but I dont know how to implement that just yet. To sum up these ramblings, the 65C802 project is at an stand-still for the moment. Until I figure out a way around the difference between the two processors I cant do much more but listen to the 1200xl doing sound checks with the standard 6502 board. Suggestions are solicited. CPU speedup seems like it might be possible, but I'm not going to be working on it anytime soon, I think someone out there already mentioned that he was close to a solution; it would be nice to here his comments and how he attacked the problem. Any comments from the Atari Inc. people on what their users are trying to do to their machines??? Scott Cothrell Cothrell at dockmaster.arpa
dyer@atari.UUCP (Landon Dyer) (09/23/87)
> about increasing the speed...been thinking about that too. My data book > (ala Synertek, 1983) shows 6502 available to 4 Mhz, 6520 to 2Mhz. In The "world's record" for a 6502 is 24 Mhz (it was a one-of-a-kind chip). With today's technology (the 6502 is about ten years old) you could make 32 Mhz versions. Put that in your '386 and smoke it! -- -Landon Dyer, Atari Corporation {sun,amdcad,imagen,hoptoad}!atari!dyer The views expressed here do not necessarily reflect those of Atari or the AI software that has taken over my brain. YOW! I am waiting for my warranty-expired interrupt!