henry@utzoo.UUCP (Henry Spencer) (02/10/87)
> If you want a really shocking idea, consider the latest notion from Cheriton > and his bunch at Stanford... Several people have asked me for a reference on this. The only one I have is this: Software-Controlled Caches in the VMP Multiprocessor David R. Cheriton, Gert A. Slavenburg, Patrick D. Boyle Dept of Computer Science, Stanford U, Stanford, CA 94305 Tech report number STAN-CS-86-1105. This report is dated about a year ago, so it may well be out of print by now, meaning you'd have to get it from NTIS. Note also that Stanford CS tech reports cost money. One thing I didn't go into in the original message was their clever scheme for cache consistency in a shared-memory multiprocessor. Basically, each processor board has a little widget that watches the memory bus. When it sees some other processor referencing something that its own processor has in cache, it may interrupt its processor and/or force an abort of the other processor's memory access. If its own processor has the data read-only and the other processor wants it read-only, the bus watcher does nothing. If its own processor has the data read-only and the other processor is fetching it for modification, the bus watcher interrupts its own processor so that the cached copy can be invalidated. If its own processor has the data for modification, the bus watcher aborts the other's access and interrupts so that its own processor can flush the data back to memory. A processor which wants data just keeps trying until it gets it. The bus-watcher is just a lookup RAM, maintained by its processor, with a couple of bits of status ("don't have it", "have it readonly", "have it read-write") for each cache- line-sized piece of physical memory. Neat. -- Legalize Henry Spencer @ U of Toronto Zoology freedom! {allegra,ihnp4,decvax,pyramid}!utzoo!henry
dmc@videovax.UUCP (02/13/87)
A somewhat more accessible citation for: -------- Software-Controlled Caches in the VMP Multiprocessor D.R. Cheriton, G.A. Slavenburg, P.D. Boyle Conference Proceedings, the 13th Annual International Symposium on Computer Architecture, Tokyo, Japan June 2-5, 1986 Published as: Computer Architecture News Volume 14, Number 2 June 1986 -- Don Craig dmc@videovax.Tek.COM Tektronix Television Systems ... tektronix!videovax!dmc