nw@vaxine.UUCP (04/07/87)
In a 68020/68851 system, it appears that when using TAS instructions (or any
RMC instruction) that either:
1) You must be certain that the page descriptor is already in the '851 ATC
- OR -
2) The bus error handler has to be able to decode the bus error frame,
detect the RM bit, chase the PC to find out the offending instruction
(TAS, CAS, CAS2), and "emulate" it (i.e., dispatch to a routine which
contains or is made to contain the appropriate instruction).
Is this right?
----
Extra detailed discussion ... skip if not interested
The root of this question is the fact that the '851 will arbitrate for BOTH the
logical and physical bus if a table walk is required (see, e.g., 4.4 LOGICAL BUS
ARBITRATION, p 4-41, 1986 '851 manual). It uses relinquish-and-retry which the
68020 will not honor during an RMC cycle (it bus errors instead).
As I see it, (1) can't really work. For a user-mode program I guess you'd
set up a convention requiring the program to "touch" the address(es) before
using TAS/CAS/CAS2. Questionable, especially if I can't guarantee I'll have
control over all the code written for the machine. Besides, I don't think
this method is guaranteed to work ... what if you get context switched
after the "touch" but before the TAS/CAS/CAS2 (with a long enough delay the
just-loaded ATC entry for your page could get flushed).
One could always advertise that TAS/CAS/CAS2 don't work; I'd rather not do that
(and I want TAS/CAS/CAS2 for supervisor code).
The 68020 book describes (2) (6.4.1., BUS ERROR RECOVERY / Special Status Word).
I'd like to hear from people who have done this. Was it a nightmare?
Thanks in advance.
Neil Webber Palladium Data Systems, Inc., Marlboro MA
{decvax,ihnp4,allegra}!encore!vaxine!nw
DISCLAIMER: We don't have our UNIX machines yet. Automatix (vaxine) has
graciously given me access to USENET; I no longer work there and they
aren't responsible for what I say. So there.