aburto@marlin.NOSC.MIL (Alfred A. Aburto) (02/19/88)
Hello,
I have an Amiga computer with a 68020/68881 and 32-bit memory
installed. This system has worked very well for me over the
last year or so.
I've recently 'upgraded' to a 68030 CPU by installing a small
pc-board 68030 CPU in place of the 68020. Without data cache
enabled, MMU enabled, and 2 cycle 32-bit memory, the 030 appears
to perform about equally to the 020. This is pretty much as I
expected.
My problem is that I can't test the 030 data cacheing without
using the 030 MMU to disable certain parts of memory and I'm
having troubles figuring out exactly how one constructs the 030
MMU logical address translation tables. One good, well documented,
example of exaclty how one would set up a Translation Table to
cover the physical address range from $00000000 through $00FFFFFF
with the capability of turning off the data cacheing from $00D00000
Through $00F00000 would be a great help. Anyone have a good example
(partial example), or is there a good reference someone can point
me to?
I thought I could (as a first test) use the transparent translation
registers (TT0,TT1) to disable data cacheing from $00000000 through
$00FFFFFF and enable data cacheing from $7F000000 through $7FFFFFFF
(partially filled with 32-bit memory) but I was unable to do so
without crashing the system when I turned the data cache on. I guess
I must have translation tables installed whether I like it or not?
Perhaps I'm out-of-luck anyway because the Amiga is multitasking and
task switching without flushing the address translation cache (ATC)
can mess things up. If this is the case then I'm stuck because the
ATC flushing must be done by the operating system and there is not
much I can do from the user side(except to keep the data cache off).
Thanks,
Al Aburto
nosc!marlin!aburto
nosc!marlin.nosc.mil!aburtodaveh@cbmvax.UUCP (Dave Haynie) (03/08/88)
in article <1030@marlin.NOSC.MIL>, aburto@marlin.NOSC.MIL (Alfred A. Aburto) says: > > Perhaps I'm out-of-luck anyway because the Amiga is multitasking and > task switching without flushing the address translation cache (ATC) > can mess things up. If this is the case then I'm stuck because the > ATC flushing must be done by the operating system and there is not > much I can do from the user side(except to keep the data cache off). This shouldn't be a problem. The address translation cache should be flushed on task swap by something like UNIX, where multiple tasks can occupy the same virtual addresses at the same time. But on the Amiga, there should be a direct mapping of virtual to physical addresses. I'm no wiz on the software aspects of the MMU, but that sounds like the main reason for the cache flush. Are there any others? > Al Aburto -- Dave Haynie "The B2000 Guy" Commodore-Amiga "The Crew That Never Rests" {ihnp4|uunet|rutgers}!cbmvax!daveh PLINK: D-DAVE H BIX: hazy "I can't relax, 'cause I'm a Boinger!"