[comp.sys.m68k] 68020 self test

jdg@moss.ATT.COM (06/09/88)

I'm looking for a comprehensive cpu self-test for the 68020. It seems
kinda silly to reinvent the wheel. I need to be able to detect 98% of
all faults (yeah, that's the ticket... no, let's make it 102%!). If
anyone has some source or references, I'd be grateful.

Dave Garland					:"Those who use the cutting edge
201-386-6788					: of technology shall be
![ ihnp4 ulysses cbosgd allegra ]!moss!jdg	: impaled upon it."
						: Anon.

jbm@uncle.UUCP (John B. Milton) (06/14/88)

In article <27856@clyde.ATT.COM> jdg@moss.ATT.COM writes:
>I'm looking for a comprehensive cpu self-test for the 68020. It seems
...
I once heard that there is a mode the 68020 can be put in where the
microcode can be read out. This was supposedly used as part of the test
at the factory. Does anyone know if this is actually true or what the
procedure is?

John
-- 
John Bly Milton IV, jbm@uncle.UUCP, {ihnp4|osu-cis}!n8emr!uncle!jbm
home: (614) 294-4823, work: (614) 459-7641; talk to me about fractals

rmf@actnyc.UUCP (Robert M. Fuhrer) (06/17/88)

In article <294@uncle.UUCP> jbm@uncle.UUCP (John B. Milton) writes:
<I once heard that there is a mode the 68020 can be put in where the
<microcode can be read out. This was supposedly used as part of the test
<at the factory. Does anyone know if this is actually true or what the
<procedure is?
<
There is a Motorola application note which describes the testing methodology
used for the 68020 out of the factory.  Basically, they use a combination of
functional testing (but not a whole lot, given the complexity of the chip),
and structured testing, which involved putting the chip in a special mode
via unusual (non-operating mode) voltages on certain pins.  Some portion of
the test did bring PLA outputs and/or microcode out on the address (?) pins,
as I recall.  Unfortunately, the article isn't here with me, or I'd give you
the number.  I presume your local Motorola marketing/sales person could
furnish you with it...
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