kurash@eleazar.dartmouth.edu (Mark Valence) (11/17/88)
Where can I get technical info on the instruction cache of the MC68020? I am trying the Freeware BBS, and thought someone here might be able to help. Specifically, I need info on 1) how the cache is filled. 2) how cache misses are handled. Any info or guidance is much appreciated. Thanx in advance. M. Valence.
schmitz@fas.ri.cmu.edu (Donald Schmitz) (11/17/88)
In article <10940@dartvax.Dartmouth.EDU> kurash@eleazar.dartmouth.edu (Mark Valence) writes: >Where can I get technical info on the instruction cache of the MC68020? >I am trying the Freeware BBS, and thought someone here might be able to help. > >Specifically, I need info on > >1) how the cache is filled. >2) how cache misses are handled. > Chapter 7 of the 68020 data book describes the I-cache. Its operation is very simple (chapter 7 has only 4 pages). Basically, address bits 2-7 are used as an index into the cache (it is 64 entries long), and if the top 24 bits of the address match the cache entry tag, the instruction is fetched from the cache, otherwise it is fetched from memory and the cache entry is updated to contain the newly fetched instruction. A cache control register allows you to turn enable, disable, clear and freeze the cache. Don Schmitz --