scott@bbxeng.UUCP (Engineering) (08/30/89)
In article <7784@cbmvax.UUCP> bryce@cbmvax.UUCP (Bryce Nesbitt) writes: > >Number three on my "wish list" of 680XX opcodes is: > > tst.l a0 > >As we all know, this instruction is documented as illegal in all Motorola >documentation. 68000 processors take an illegal exception. The 68020 >and 68030, however will properly execute tst.l a0 (!). I always thought it was strange that the 68000, which is picky about odd/even addresses, did not have a bit test instruction for an address register. -- --------------------------------------- Scott Amspoker Basis International, Albuquerque, NM 505-345-5232
tkacik@rphroy.UUCP (Tom Tkacik) (08/31/89)
In article <7784@cbmvax.UUCP> bryce@cbmvax.UUCP (Bryce Nesbitt) writes: > >Number three on my "wish list" of 680XX opcodes is: > > tst.l a0 > >As we all know, this instruction is documented as illegal in all Motorola >documentation. 68000 processors take an illegal exception. The 68020 >and 68030, however will properly execute tst.l a0 (!). Wrong! As most of us know :-), this is documented as legal in the 68020 and 68030 Motorola documentation. For the 68000, the manual states: Effective Address field - Specifies the destination operand. Only data alterable addressing modes are allowed as shown: For the 68020 and 68030, it states: Effective Address field - Specified the destination operand. If the operation size is word or long, all addressing modes are allowed. If the operation size is byte, only data addressing modes are allowed as shown: As you can see tst.w a0 will also work. -- --- Tom Tkacik GM Research Labs, Warren MI 48090 uunet!edsews!rphroy!megatron!tkacik "If you can't stand the bugs, stay out of the roach-motel." Ron Guilmette
davet@oakhill.UUCP (David Trissel) (08/31/89)
In article <7784@cbmvax.UUCP> bryce@cbmvax.UUCP (Bryce Nesbitt) writes: > >Number three on my "wish list" of 680XX opcodes is: > > tst.l a0 > >As we all know, this instruction is documented as illegal in all Motorola >documentation. 68000 processors take an illegal exception. The 68020 >and 68030, however will properly execute tst.l a0 (!). Actually this addressing mode IS documented in the MC68020 and MC68030 manuals but so pathetically bad that it is misread by almost all readers (initially including myself.) Note the following which appears above the supposed table of valid effective addresses for TST and pay attention to what I've underlined: --------------- Effective Address field - Specifies the destination operand. If the operation size is word or long, all addressing modes are allowed. If the ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ operation size is byte, only data addressing modes are allowed as shown: [Table appears here with dashes indicating no An and #<data> modes] ---------------- In fact, I wouldn't be a bit surprized if the table is STILL wrong and that a tst.b will work with immediate data. A lot of people besides myself have bitched about this misguiding documentation but those in charge of it don't seem to care. -- Dave Trissel Motorola Austin
rbt@cernvax.UUCP (roberto divia) (08/31/89)
Quoted from the MC68020 & MC68030 User's Manual, TST instruction description,
page B-167 (MC68020UM/AD REV 1) and 3-190 (MC68030UM/AD):
"Effective address field - Specifies the destination operand. If the operation
size is word or long, all addressing modes are allowed. [...]"
New opcode? Really?
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