panisset@mcgill-vision.uucp (Jean-Francois Panisset) (06/01/90)
I have a question about the 68020 which I haven't been able to answer from the 68020 databook: what happens while the 68020 has granted the bus to another master? Does it freeze completely? Does it continue to execute the instruction it was executing (as long as it does not generate any more bus cycles)? Or will it keep on executing instructions as long as these are contained in the instruction cache and require no external bus cycles. I would REALLY like the last case to be the right one, although the fact that the 68020 asserts ECS* even when a cache hit occurs makes me somewhat skeptical about this. Thanks in advance for any 68020 gurus who might be able to answer this... JF -- Jean-Francois Panisset "Bon, ben, les enfants, on est INET: panisset@larry.mcrcim.mcgill.edu arrives a Rigaud. On peut UUCP: ...!mcgill-vision!panisset s'en r'tourner!"