krooglik@ecr.mu.oz.au (Alexander Krooglikov) (11/02/90)
Recent discussion here in Australia is presently centred on whether RISC will eventually displace the conventional microprocessor. OK, so Motorola has the 88000 and Intel the i860. Does anyone have specifications that would point towards the eventual demise of the present CISC? ie. FP performance, bus read/write cycles, caching, etc, etc. _______________________________________________________________________ Alex Krooglik krooglik@ecr.mu.oz.au University of Melbourne Melbourne, Australia.
shwake@raysnec.UUCP (Ray Shwake) (11/04/90)
krooglik@ecr.mu.oz.au (Alexander Krooglikov) writes: > Recent discussion here in Australia is presently centred on whether >RISC will eventually displace the conventional microprocessor. OK, so >Motorola has the 88000 and Intel the i860. Does anyone have specifications >that would point towards the eventual demise of the present CISC? ie. >FP performance, bus read/write cycles, caching, etc, etc. I suggest that such argument misses the real points: 1) both CISC and RISC chips have advanced rapidly in sophistication and performance in recent years, partly because 2) CISC and RISC designs increasingly adopt characteristics of their counterparts, and therefore 3) CISC and RISC designs are becoming *more* alike even as they continue to emphasize different characteristics. High-end CISC processors like the '486 and '040 perform most of their operations at or near one cycle per op, while advanced RISC chips like that offered by IBM support far more operations in silicon than their predescessors. Designers of both CISC and RISC chips have learned to adopt the finer qualities of their opposites. Of course, to the end user (whether technically oriented or not) what *should* matter is what one gets *out* of the box, and here implemen- tation and development tools often count for at least as much as chipset. shwake@rsxtech