daveh@cbmvax.commodore.com (Dave Haynie) (06/07/91)
In article <ALANR.91May26152339@media-lab.media-lab.media.mit.edu> alanr@media-lab.media-lab.media.mit.edu (Alan Ruttenberg) writes: >I was wondering if a 68040 can be substituted for a 68030 in a >MacIIfx. I understand that the pinouts and the clock rate (40Mhz 030 >25Mhz 040) are different. Considerably different. The 68040 bus is completely different than the 68030 bus. There's no dynamic bus sizing. All normal memory cycles are "burst" cycles, even writes in the preferred operating mode. The '040 runs from two clocks: BCLK, which determines the bus speed (25MHz is normal) and PCLK, which determines the ALU speed (50MHz on a 25MHz chip). There's no real practical way to kludge this into a 68030 socket, though I suppose someone will do it anyway. Perhaps if the IIfx has some kind of slot designed for a 68040 card, you could build an upgrade. This is what we did on the Amiga 3000. >What I am curious about is what a minimal upgrade to a 040 would >entail. Can I buy a chip, and build a small adapter board? Or are >there many changes that would have to be made. First of all, you need a bus conversion state machine, which will translate 68040 signals into 68030 signals. This isn't all that difficult, if you're real familiar with 68030 signals, but it's not something you'll hack together in a weekend. You also need bus bridging buffers to handle whatever subset of the 68030 bus sizing mechanism the IIfx requires. In other words, you need the Motorola hardware documentation. They do have an appnote on an example 68040->68030 bus converter, which might be a good starting point, even though it looks a little bloated. -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy "This is my mistake. Let me make it good." -R.E.M.
wayne@dsndata.uucp (Wayne Schlitt) (06/11/91)
In article <ALANR.91May28165516@cecelia.media-lab.media.mit.edu> alanr@cecelia.media-lab.media.mit.edu (Alan Ruttenberg) writes: > > I was wondering if a 68040 can be substituted for a 68030 in a > MacIIfx. I understand that the pinouts and the clock rate (40Mhz 030 > 25Mhz 040) are different. > > What I am curious about is what a minimal upgrade to a 040 would > entail. Can I buy a chip, and build a small adapter board? Or are > there many changes that would have to be made. > i dont think you can easily replace a 68030 with a 68040. hp has a board that makes a 50MHz 68030 look like a 25Mhz 68040. i know they are going to have a lot of those boards laying around from all the upgrades they are doing but i doubt that you could get one. from the size and complexity of the board, i would say that the problem is far from trivial... -wayne
png@netcom.COM (Peter Glaskowsky) (06/11/91)
alanr@cecelia.media-lab.media.mit.edu (Alan Ruttenberg) writes: > I was wondering if a 68040 can be substituted for a 68030 in a > MacIIfx. I understand that the pinouts and the clock rate (40Mhz 030 > vs. 25Mhz 040) are different. > > What I am curious about is what a minimal upgrade to a 040 would > entail. Can I buy a chip, and build a small adapter board? Or are > there many changes that would have to be made. Actually, the Motorola "MC68040 Designer's Handbook" (MC68040DH/AD), a snazzy slip-cased 3-ring binder, contains a section entitled "MC68040 to MC68030 Bus Adapter Application". There's a complete schematic with part numbers, and equation files for all the PALs in the design. In short, it describes 100% of the necessary hardware. There are some limitations; some of the bus interface protocols are necessarily different, but these can be overcome with the addition of some firmware and/or system software patches. That's the rub... NONE of the necessary firmware/software is provided. Paragraph 7.1.1, "Software": "System software issues include differences in the memory management structure, internal cache initialization and management, software emulation of unimplemented floating-point instructions, emulation of unsupported instructions, and the exclusion of the instruction continuation exception model (i.e., bus error)." The design requires the following chips: MC88195 clock generator 6 PALs (3*22V10, 20R8, 16R8, 16R6) 9 TTL logic packages (74F139, 74AS20, 74AS32, 74AS00, 74F64, 74AS821, 74AS257, 2*74AS573) 8 bus buffers (74F543) plus various passive components. Now... maybe this is irresponsible speculation, but in the Mac Zone ad in the July 1991 "MacWorld" magazine, there's a nice color picture of a product called Magellan, from Total Systems. This is an 040 accelerator for the SE/30 or IIsi. (IIci and IIfx models are promised but no prices are listed.) It appears to me to have a special oscillator module, 7 PALs, 8 74FCT543's, and miscellaneous logic and passive components. Could this be the Motorola circuit? Are they using some sort of INIT to patch the system? I don't know. The product is reasonably priced, but it's out of my range for the moment, and I have a IIcx anyway. (Disclaimer: I'm not associated with Total Systems, Mac Zone, or Motorola.) . png
glenn@gla-aux.uucp (Glenn Austin) (06/12/91)
In article <1991Jun11.021641.6346@netcom.COM>, png@netcom.COM (Peter Glaskowsky) writes: > Actually, the Motorola "MC68040 Designer's Handbook" (MC68040DH/AD), > a snazzy slip-cased 3-ring binder, contains a section entitled "MC68040 > to MC68030 Bus Adapter Application". > > There's a complete schematic with part numbers, and equation files for > all the PALs in the design. In short, it describes 100% of the necessary > hardware. There are some limitations; some of the bus interface > protocols are necessarily different, but these can be overcome with > the addition of some firmware and/or system software patches. Actually, their bus interface doesn't work. They also tell designers to do some things that cause the Mac peripherals (such as the on-board video) to *BREAK*. =============================================================================== | Glenn L. Austin | "Turn too soon, run out of room. | | Macintosh Wizard and | Turn too late, much better fate." | | Auto Racing Driver | -- Jim Russell Racing School Instructors | |-----------------------------------------------------------------------------| | Don't take me too seriously -- I never do! :-) | |-----------------------------------------------------------------------------| | Usenet: glenn@gla-aux.uucp or glenn%gla-aux.uucp@skinner.cs.uoregon.edu | ===============================================================================
mingo@cup.portal.com (Charles Hawkins Mingo) (06/13/91)
Let's try this again from a better machine. In article <ALANR.91May28165516@cecelia.media-lab.media.mit.edu> alanr@cecelia media-lab.media.mit.edu (Alan Ruttenberg) writes: > > I was wondering if a 68040 can be substituted for a 68030 in a > MacIIfx. I understand that the pinouts and the clock rate (40Mhz 030 > 25Mhz 040) are different. > > What I am curious about is what a minimal upgrade to a 040 would > entail. Can I buy a chip, and build a small adapter board? Or are > there many changes that would have to be made. Daystar has distributed a memo explaining why substituting the 68040 for the 68030 is harder than you might think. I'm just forwarding this, and you should address any comments/questions to "73777.2453@compuserve.com". The 68040 on the Macintosh [Originally from: Steve Tuttle [DayStar] 73777,2453 From Internet --> 73777.2453@compuserve.com Reposted without permission] March 25, 1991 (c) DayStar Digital, Inc. 1.0 Overview The Motorola 68040 processor is a major step forward in processing power. When compared to a 25 MHz 68030/68882, a 25 MHz 68040 offers double the integer performance and three times the speed in floating point calculations, as shown in Table 1. But a 25 MHz 68040 is only slightly faster than a 40 MHz 68030 (Mac IIfx). Table 1 Performance Relative to a 25 MHz 68030/68882 Ref: Motorola Type 25 MHz 68030 40 MHz 68030 25 MHz 68040 ______________________________________________________________ Integer 1.0 1.6 2.1 FPU 1.0 1.6 3.3 Integer calculations, which drive Mac operating system (OS) performance and all applications show gains of 30%. The real strength of the 68040 lies in the speed of floating point calculations, but these have little or no benefit for the typical graphics user. Only applications in the scientific and CAD markets use the floating point unit (FPU). In several years the 68040 will be running at 40 MHz. This processor will provide the much needed power in the DTP, graphics, pre-press and scientific markets. Software compatibility will be a major problem on 68040 accelerators as well as Apple's new 68040 machine. Apple will have to make major patches to the Mac OS to handle problems with memory management and exception handling. In addition, the math code within applications will have to be rewritten to directly leverage the benefits of the 68040's FPU. For these reasons, DayStar has decided to wait to introduce its 68040 accelerator until after the introduction of Apple's 68040 machine. Apple is best suited make the necessary OS changes as well as drive changes in third party applications, INITs and cdevs. 2.0 Lessons From the Past Each new generation of processor from Motorola has incorporated new features and capabilities, many of which are not compatible with the current generation. The Mac OS, by its very nature, directly addresses the hardware. To the extent that the hardware changes, the OS must be patched. The greater the change in the architecture of the processor, the greater the number and sophistication of the patches. 2.1 The First Accelerators The first Mac Plus and SE accelerators utilized a 68020 with a 32-bit bus as compared the 16-bit bus on the Mac SE's 68000 processor. That and its faster clock speed (16 MHz vs. 8 MHz) caused many aggravating incompatibilities with parts of the Mac OS, various applications, and many INITs. It was not until the Mac II was introduced with its own 16 MHz 68020 did Apple and the developer community completely solve the problems. 2.2 The Mac II Accelerators Problems started over again when Apple introduced the 16 MHz 68030 Mac IIx. Surprisingly, the 68030 is nearly identical to the 68020 except for the addition of the 256 byte internal data cache and the memory man agement unit (MMU). Yet there were numerous incompatibilities with various parts of the Mac OS, third party INITs and applications. Many cdevs and INITs accomplish their special task by making changes to the OS or directly addressing the hardware (necessary to accomplish a special task that Apple did not provide, nevertheless, a violation of Apple guidelines). Applications that closely followed developer guidelines generally worked well on the 68030 conversion. There were several key applications that had problems working with the internal cache. At the same time DayStar introduced its 33 MHz 68030 accelerators. Once again, it (and others) exposed yet another set of problems with applications, INITs and cdevs that had clock timing dependencies and problems working with an external memory cache. Even Apple's floppy driver code would not run properly at speeds above 16 MHz. DayStar (and others) invested significant time patching the floppy driver code. For the 25 MHz Mac IIci, Apple had to completely rewrite their floppy driver code to eliminate these timing dependencies. From a software standpoint, conversion from the 68020 world to the 68030 was about as easy as one could ever ask for. Yet it was very frustrating for the end-user. While most problems were encountered with INITs and cdevs, users were not willing to eliminate them as they had become an essential part of their "tool kit". Some early buyers found the experience very frustrating - they did not have the time (or skills) to fiddle around trying to debug their machine. The same experience was once again repeated when Apple introduced their 32-bit clean ROMs on the Mac IIci and Mac IIfx. With over a year of warning from Apple to the developer community, there were still many applications, INITs and cdevs that had significant problems, driving the users crazy. 3.0 Performance The 68040 incorporates several innovative design features that boost performance over a 68030/68882 combination running at the same clock speed. Gains are realized in both integer and FPU performance. Integer performance drives the Mac OS and virtually all applications. Mac OS, graphics, DTP and pre-press applications make little or no use of the FPU, as shown in Table 2. FPU performance is of benefit only for a subset of functions within CAD and scientific applications. Spreadsheets only use the FPU for spreadsheet recalculations. Table 2 Benefit of 50 MHz FPU on IIci Accelerator Ref: DayStar Platform Mac IIci Accel IIci Accel IIci Accel IIci Processor 68030 68030 68030 FPU Clock 25 MHz 50 MHz 50 MHz % Gain FPU Yes No Yes Yes _______________________________________________________________________ Word Scroll 8.9 6.5 6.5 0% RenderMan Render 98.0 82.0 56.0 46% Excel Cut&Paste 9.1 5.5 5.5 0% Excel Scroll 10.3 10.0 0.0 0% Excel Recalc. 10.4 6.6 5.6 17% Quark Xprs Fit in wind 5.4 3.4 3.4 0% Quark Xprs Scroll 24.2 16.9 16.9 0% FreeHand Fit wind 21.8 11.9 11.9 0% FreeHand Duplicate 34.5 18.7 18.7 0% FleMkr Pro Sort 56.3 42.2 42.2 0% Swivel 3D Change View 17.4 8.1 8.1 0% Swivel 3D Tween 73.1 32.6 32.6 0% Claris Cad Fit in wind 6.5 4.6 4.2 8% Photo Shop Rotate 4.8 3.6 3.6 0% Photo Shop Resample 36.6 19.7 19.7 0% Photo Shop Gausian Blr 19.3 12.0 12.0 0% ________________________________________________________________________ Total Time (sec) 436.53 284.18 256.79 11% Shown in Table 2 is a Mac IIci accelerator with and without a 50 MHz 68882 FPU. Doubling the speed of the FPU has no benefit in many applications, even within CAD applications. Based on the evidence in Figure 2, DayStar recommends that its graphics and DTP customers not buy an optional 68882 FPU on its accelerators. 3.1 Integer Performance For integer performance, the 68040 has a high degree of instruction parallelism -- it is capable of executing in one clock cycle an instruction that may take 3-4 cycles to execute on a 68030. The 68040 has two 4,096 byte caches for both instruction and data, and both are four-way set associative. Contrast this to a 68030, which has only a 256 bytes direct mapped cache (less efficient). Therefore, the 68040 will exhibit a much higher "hit" rate allowing zero wait state performance up to 40 MHz. In fact, the 68040 caches are so efficient that there will be no need to add an external cache, as is required in the faster 68030's. Predicted integer performance for the 68040 (based on Motorola data) is shown in the Table 3 against a zero wait state 68030. Percentage gains are shown against a 40 MHz 68030 (to represent a Mac IIfx). Expected gains for the 25 MHz 68040 are only on the order of 30% (1.3) when compared to the 40 MHz 68030. Table 3 Performance Relative to a 40 MHz 68030 Ref: Motorola Clock 68030 68040 68040 Volume Ship ______________________________________________________________ 16 MHz 0.4 n/a n/a 25 MHz 0.6 1.3 Q2-91 33 MHz 0.8 1.7 Q1-92 40 MHz 1.0 2.1 Late 92 50 MHz 1.3 n/a n/a Gains of 30% will not satisfy power users. They really demand gains of 100-200%, and these will not be available for several years, at least for the Mac IIfx. Gains on the 16 MHz Mac IIs should be a little over three times greater when the 40 MHz 68040 is introduced in late 1992, so an appreciable upgrade market will exist for users who want better than IIfx class performance. But in the mean time, will the initial 68040 compatibility problems be more of a problem than a IIfx upgrade or a 50 MHz accelerator? 3.2 FPU performance The real power of the 68040 lies within its FPU performance. By combining the CPU and FPU into the same piece of silicon, FPU has been boosted three times. But to achieve this integration Motorola accepted a major sacrifice in instruction set commonality. Applications not written to directly address the 68040 FPU will either have to be rewritten, or will have to operate through about 256K of code that translates the 68882 calls into 68040 calls. The overhead required for this translation process will drastically reduce 68040 FPU performance gains. If an FPU intensive function is rewritten to directly use the 68040 FPU instruction set, then performance gains can be substantial. Table 4 contains estimates for the impact of the 68040 FPU on the two FPU intensive func tions shown in Table 2. Table 4 Estimated Possible 25 MHz 68040 FPU Performance Gain Ref: DayStar Platform Mac IIci Accel IIci Accel IIci Accel IIci Processor 68030 68030 68040 FPU Clock 25 MHz 50 MHz 25 MHz % Gain FPU Yes Yes Yes _______________________________________________________________________ RenderMan Render 98.0 56.0 17.8 215% Excel Recalculate 10.4 5.6 3.5 60% In summary, the Mac community will not see immediate gains in 68040 performance. A 25 MHz 68040 is not that much faster than a Mac IIfx, for integer performance. And, 68040 FPU performance will be of little benefit to the typical Mac user. However, in several years the 40 MHz 68040 will be double the speed of the Mac IIfx, and offer even greater gains for CAD and scientific functions directly utilizing the 68040's FPU. 3.3 Today's Accelerator Performance The limited gains of the 25 MHz 68040 are verified by benchmarks run at the January, 1991 San Francisco Macworld. Here, prototype accelerators were being shown by two different companies. In Table 5, benchmark performance is shown against current state-of-the-art machines. These tests show that gains in integer performance are below Motorola estimates. FPU performance is no better than a regular Mac. These prototypes were operating in a very restricted environment (they were only running benchmarks). Applications were not being shown. In contrast, once the 68030 was stable, up and running, there were few Mac OS or application problems to overcome. In all fairness, these were just early engineering prototypes, and they had not yet "tweeked" performance to the maximum, as is common in the development process. Table 5 25 MHz Prototype Accelerator Performance Ref: DayStar Measurements OEM Apple Apple DayStar TokaMac IIR Platform Mac IIci Mac IIfx Mac IIci Mac LC Mac II/IIx CPU 68030 68030 68030 68040 68040 FPU Yes Yes Yes Yes Yes Speed 25 MHz 40 MHz 50 MHz 25 MHz 25 MHz _______________________________________________________________________ Float Integer 0.18 0.15 0.10 0.20 0.10 Trig FPU 0.57 0.36 0.32 3.18 1.20 Butterfly FPU 2.33 2.17 1.57 4.18 2.40 Ripples FPU 17.10 12.87 9.83 30.53 7.80 Sieve Integer 0.27 0.18 0.15 0.22 0.16 Moire Integer 8.77 9.40 5.58 7.50 5.20 _______________________________________________________________________ Total (sec) 29.22 25.13 17.55 45.81 16.86 4.0. Compatibility The major problems come in the area of software integration (both Mac OS and applications). There are three areas of compatibility problems: (1) memory management, (2) exception handling and (3) floating point. 4.1 Memory Management Since the introduction of the Mac IIx, use of the Memory Management Unit (MMU) in the 68030 has become a fundamental part of Mac system software. It is used to grant access to memory, flip between 24 and 32 bit mode, and provide virtual memory under System 7.0 and A/UX. Both the 68030 and 68040 have on-chip MMUs, but they are very different in feature set, register format, and page table formats. It is safe to say that all ROM code and Mac system software which deals with the MMU must be modified to run on the 68040. The majority of third party software should not need modification (except processor specific products such as Virtual) or products that address MMU hardware directly (those which violate Apple's guidelines). 4.2 Exception Handling An exception is defined as a condition that the processor does not know how to handle. For example, dividing by zero, accessing non-existent memory, and unknown processor instructions all generate exceptions. The processor saves information about the operation on the stack and calls the exception handler. In some cases, the 68040 will put different information on the stack than the 68030, causing an error with the exception handler. Applications, INITs and cdevs commonly use the bus error mechanism to check for the existence of memory. All of these must be recoded to run on the 68040. Mac debuggers must also be modified for correct operation on the 68040 Mac system and ROM software which handles exceptions must be modified, as well as the A/UX kernel. Some third party software will also need to be changed. 4.3 Floating Point Unit The 68882 (the FPU that is used with 68030 based systems) understands 50 different operations. The 68040 understands only 20. Unlike the 68882's FPU, the 68040's internal FPU does not provide trigonometric operations such as SIN, COS, and TAN. For applications to work correctly, an emulator must be provided that runs whenever an unrecognized floating-point operation is encountered. This software must decode the requested operation, do the operation in software, and return the results to the program. This processing can be done transparently to the user under System 6 and System 7. For A/UX compatibility, the kernel will have to be modified. Motorola provides about 256K of translation code to be called by the modified OS, but it adds additional overhead to the processor to translate the code. This tends to offset the performance benefits. 5.0 Conclusion Conversion from the world of the 68030 to the 68040 is the toughest one faced yet. Early accelerator board users will face an unpredictable environment where some INITs, cdevs, applications do not work. Most of all, they will face an operating system with major incompatibilities in a few key areas (especially System 7 virtual memory). In addition, performance gains for the 25 MHz and 33 MHz version will not be much greater than IIfx levels. For these reasons, DayStar decided in early 1990 to wait until Apple introduced their own 68040. Apple can best make the changes necessary for 68040 compatibility. DayStar has learned that end-users judge accelerator quality first by compatibility and then by speed. Until a product is reliable, for whatever reason, it should not be shipped. Waiting for Apple's 68040 to be released will force the developer community to solve its compatibility problems, with a speed far greater than that provided by any third party developer. In addition, Apple will have solved its own incompatibilities with the op erating system. Several months after Apple's 68040 introduction DayStar plans to introduce a 68040 accelerator. It will be an accelerator that builds on Apple's approach to 68040 integration. This was an especially difficult decision since DayStar had always been the first to bring faster speed to the Macintosh II family. In this case, it is best to let Apple go first. DayStar does not want to place its users on the "bleeding-edge" of technology with little or no performance benefit.
jtr@oakhill.sps.mot.com (Jim Reinhart) (06/13/91)
In article <43234@cup.portal.com> mingo@cup.portal.com (Charles Hawkins Mingo) writes: > > Let's try this again from a better machine. > >In article <ALANR.91May28165516@cecelia.media-lab.media.mit.edu> alanr@cecelia >media-lab.media.mit.edu (Alan Ruttenberg) writes: >> >> I was wondering if a 68040 can be substituted for a 68030 in a >> MacIIfx. I understand that the pinouts and the clock rate (40Mhz 030 >> 25Mhz 040) are different. >> >> What I am curious about is what a minimal upgrade to a 040 would >> entail. Can I buy a chip, and build a small adapter board? Or are >> there many changes that would have to be made. > > Daystar has distributed a memo explaining why substituting the 68040 >for the 68030 is harder than you might think. I'm just forwarding this, >and you should address any comments/questions to "73777.2453@compuserve.com". > Motorola categorically denies substance to Daystar performance claims attributed to Motorola and will post a thorough discussion of the erroneous and misleading data presented by Daystar. The summary of this discussion is that Daystar builds a warped set of conclusions (some are actually reasonable) based on data attributed Motorola that is WRONG. They know it is wrong as well but persist in this silly pursuit to justify not bringing a product to market and we strongly encourage anyone who reads the Daystar paper to take it with a strong grain of salt. -- Regards, Jim Reinhart Motorola Microprocessor Products Group Austin, Texas
philip@pescadero.Stanford.EDU (Philip Machanick) (06/14/91)
In article <1991Jun13.134546.25578@oakhill.sps.mot.com>, jtr@oakhill.sps.mot.com (Jim Reinhart) writes: |> Motorola categorically denies substance to Daystar performance claims |> attributed to Motorola and will post a thorough discussion of the erroneous |> |> and misleading data presented by Daystar. The summary of this discussion |> is that Daystar builds a warped set of conclusions (some are actually |> reasonable) based on data attributed Motorola that is WRONG. They know it |> is wrong as well but persist in this silly pursuit to justify not bringing |> a product to market and we strongly encourage anyone who reads the |> Daystar paper to take it with a strong grain of salt. Very interesting. I must admit to being surprised at their conclusions. An owner of a 68040 workstation told me it outperforms a DECstation 3100, despite the extra load of running Display PostScript. And I really don't believe a IIfx is in the same league as a DECstation 3100 as far as raw speed is concerned. -- Philip Machanick philip@pescadero.stanford.edu
coolidge@cs.uiuc.edu (John Coolidge) (06/15/91)
philip@pescadero.Stanford.EDU (Philip Machanick) writes: >In article <1991Jun13.134546.25578@oakhill.sps.mot.com>, jtr@oakhill.sps.mot.com (Jim Reinhart) writes: >|> Motorola categorically denies substance to Daystar performance claims >|> attributed to Motorola and will post a thorough discussion of the erroneous >|> >|> and misleading data presented by Daystar. >Very interesting. I must admit to being surprised at their >conclusions. An owner of a 68040 workstation told me it outperforms >a DECstation 3100, despite the extra load of running Display >PostScript. And I really don't believe a IIfx is in the same league >as a DECstation 3100 as far as raw speed is concerned. My experience, based on fairly heavy use of all three machines (and several others) but admittedly informal benchmarking (largely processor-intensive applications such as compilers and integer-computation tasks) would produce the following ranking: DS3100 = MacIIci < Sun SS1 = MacIIfx < HP9000/835 < DS5100 < Sun SS2. The SS2 is about 2x the SS1; the DS5100 is about 2x the DS3100. The DS3100 is probably 70-80% as fast as the fx, possibly less. I may be wrong about the relative position of the HP and the DS5100, but I think that's right... --John -------------------------------------------------------------------------- John L. Coolidge Internet:coolidge@cs.uiuc.edu UUCP:uiucdcs!coolidge Of course I don't speak for the U of I (or anyone else except myself) Copyright 1991 John L. Coolidge. Copying allowed if (and only if) attributed. You may redistribute this article if and only if your recipients may as well.