[sci.electronics] SmartWatch. Replys to killer, gardner & grr

bryce@COGSCI.BERKELEY.EDU (Bryce Nesbitt) (05/14/87)

In article <849@killer.UUCP> sentinel@killer.UUCP (The Sentinel) writes:
> 
> Hello.  I recently picked up a Dallas Semiconductor SmartWatch
> However, I have a problem.  It won't do anything.  No matter what I do
> I can't access it.

These things are very sensitive to noise and spikes.  Check for this.
Add capacitors and/or isolated ground as needed.


In article <> cbmvax!grr@seismo.ccs.GOV (George Robins) typed:
> My understanding is that these devices require some ritual address sequence
> to become activated.

Yes.  A non-interruped 64 bit sequence, one bit at a time.  In hex:

$c5 $3a $a3 $5c $c5 $3a $a3 $5c
1010001101011100110001010011101010100011010111001100010100111010

Depending on the application, this may be reads from one or another address,
writes to one or the other address or writes with data to a single address.
Depends on how you hook it up.

After the sequence is complete you get 64 read bits with the BCD clock info
or have the oportunity to write 64 bits with the new clock info.

> I assume that they've modified it slighty to work
> with ROMs.

No need.  As the data sheets for the line indicate, it is flexible and will
handle ROM or RAM.  This includes the DS1215 chip.  What is needed to write
the software is HOW the module-maker hooked up the chip. If they used
the schematics in the data sheet here is what it will look like:

ROM socket	DS1215

A0	---->	Pin 6, D	;Data In
A2	---->	Pin 3, WE	;Write Enabe
D0	---->	Pin 7, Q	;Data Out

CE	--->	Pin 11,CEI	;CE intended for rom, diverted to DS1215
CE	<---	Pin 10,CEO	;Chip enable output FROM DS1215 to the ROM

Pin 9, the ROM/RAM selector would be tied to VCOO (esentialy +5 volts).
Other pins may be ignored for this discussion

To twoggle the clock A2 will control write enable and A0 will be the
bit data.  You need a loop or 64 LDA's with A0 set with the proper
bit (1 or 0).
The reader CAN NOT be in the ROM that the clock chip is plugged into becase
that would disturb the addressing

You would then do 64 reads
the bits would appear in D0


gardner@kodak.UUCP (dick gardner)
> In order to use the Smartwatch, you must devote 1 byte of the ram contained
> in the socket for use by the clock device.  You prepare to read/write to 
> the clock by first reading the device to start the sequence, and then writing
> the 64 bit code sequence of bits to the dummy clock location in ram.

Partly wrong.  You do not need to devote ANY memory to this device (a feature)
the enable sequence is done with READS and the write sequence on a properly
designed circuit will disable CEO (chip enable output) from matching CEI
(chip enable input).
You can even set up the WRITES to be done with READS, but again I am out
of the depth of this discussion.
This applies to the bare chip only.  A module may mess with the scheme.

BTW the data sheet indicates that they have caluated a 1 in 10^19 chance
that the sequence will be inadvertantly duplcated.  The chances of this
happening for a ROM are less likely since roms are accesed in known,
repetitive patterns that are either going to match, or not.

++++++++++++++++++++++++++++++

This is the best and cheapest RTC I have found.  *MUCH* better than the
MSM6242!  [ 8-) for grr ]
Anyone want to correct me?

   //  Ban the BPTR!
\\//  bryce@cogsci.Berkeley.EDU