[sci.electronics] Help with L measurement

mark@mips.COM (Mark G. Johnson) (03/16/88)

 { line eater ? } 
  
I have a problem.  I'm trying to measure the inductance of a
gate-array (IC pin + package trace + bondwire), i.e. the total
inductance between the ground plane of my printed circuit board and
the on-chip ground metallization inside my gate-array IC.  Here are
some of the particular constraints I'm working under:

	1.  I don't have the mechanical drawings of the package so I
		can't "solve" the 3D Laplace E&B-field equations.
	2.  My test equipment consists of a 500MHz scope, 100MHz
		signal generators, VOM, etc.  I.e. no vector impedance meter.
	3.  The gate array vendor won't get any more precise than an
		estimate of 5-15 nanoHenrys.
	4.  There are about 10 ground pins/traces/bondwires on the part
		and a measure of any of them will suite me just fine.
	5.  Trusty Mr. Fluke VOM tells me that from one ground pin to another
		ground pin on the same edge of the chip, is 1.2 ohms (@ DC).
	6.  I can build a smallish jury-rigged test fixture if necessary
		(see below).

FIRST ATTEMPT:
I tried to measure the L by constructing an L-C tank circuit and measuring
the resonant frequency.  The "L" was from one ground pin, through the pkg
trace, bondwire, onto the chip, out through another bondwire, another
package trace, and another pin (i.e. 2X the L of one ground pin).

The test fixture placed a 1000pF ceramic cap across the "L", and arranged
to pull 100mA of DC current through "L".  Then the current is suddenly
(3ns falltime) cut off ... LC should ring like a Banshee.  Worked great
with a 1000 nH test inductor purchased at Fry's.  But substitute the
gate-array ground-pin "L" and, voila, no ringing at all.  Bah.

Here's the circuit; the switch is really 3 74F244 drivers in parallel.
Someone can translate it to EDIF if desired :-)

            SW                  ---------          ---------
 GND....o<-------o...../\/\/\...-1N4148 +......x...|   L   |...x....+5.0V
                       50 ohm   ---------      |   ---------   |
 +5.0V...o                                     |               |
                                               |------| |------|
                                               |     1000 pF
                                               |
                                               |
                                           Oscope probe


Now, I ask the Old Farts of the net (and the Young Turks as well), what
next?  The fixture pictured above produced negligibly small waveforms
at the scope probe point (i.e. NOT sinewaves).  The whole thing was built
over a PC ground plane.

REQUESTS
If somebody has already faced and solved this problem, I'd love to
hear about it.  In particular, a Measurement Method is highly prized,
rather than a bunch of calculations based on assumptions.  I don't
know the diameter of the bondwire, the length of the package trace,
the dielectric coefficient of the packaging material, etc.  All I
really DO know is that I have 20 of these suckers on hand, and I can
burn em out if necessary.

	Idea #1: the nonzero resistance of the test "inductor" causes
	poor oscillatory behavior.  So build an active circuit
	rather than a passive tank.

	Idea #2: Measure impedance vs. frequency.  For the expected L
	values (20 to 30E-9 Henry) this is under 10 ohms at 50 MHz.  Yuck.

 -Mark Johnson	*** DISCLAIMER: Any opinions above are personal. ***	
 UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!mark   TEL: 408-991-0208
 US mail: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086

keithl@vice.TEK.COM (Keith Lofstrom) (03/17/88)

> (paraphrase) how do I measure pingrid package inductances?

Flippant answer: It helps to work at an instrument manufacturer :-)

Real answer:  An approximate inductance suitable for low frequency
modelling could be found by grounding one end the pin, driving the
pin from a 50 ohm source, and looking at the voltage signal from 
the pin to ground on a terminated 50 ohm line into the scope.

At low frequencies (less than 100 MHz) a resistive source will look
more or less like a current source driving the pin.  You may want to
stick some attenuators between the signal source and the circuit under
test to remove any effects of the signal generator.  When you wire on
the coax for the measurement, keep the loops small, less than 0.2
inches or so.

Keep in mind that the behavior of neighboring pins on the package
(whether they are shorted, terminated, or whatever) will affect your
measurement.

-----
I assume you are measuring package inductance to see how it will
affect a digital circuit and not an RF circuit.  You will probably
want to do all this with a good, fast rise pulse generator.  Using
a sine source makes some of the calculations easier, but won't give
you as good a feel for what will happen when you put silicon in the
package.


(Pulse Gen) ===> trigger ==========>(Oscilloscope)
 |      |                            |   |
 |   (Atten)-C-----+------C--(Termination)
 |      |    O     |      O   |
 |      |    A  (D.U.T.)  A   |
 |      |    X     |      X   |
 +------+----------+----------+  Ground

First, look at the test fixture with the package not connected, and
make sure the signal is making it through cleanly.  

If the pulse takes a long time ( > 3 nsec) to flatten out,
find a better signal generator and scope, and tighten up your setup.
Ideally, you would like to be working with 100 psec or so pulses,
but you would need sampling gear and tunnel diode pulsers and such.
We normally use a device called a TDR (for time domain reflectometry)
for such measurements, but then, we are usually pushing GHz signals
around here.  (See your local Tektronix field office, plug, plug!).
The slow risetime makes the measurement harder but not impossible.


Put in the package.  What you will see will probably be a short
pulse, much smaller amplitude than the unshorted pulse, and perhaps 
a little ringy.  After that, there will be a residual DC component due
to the resistance of the run in the package under test.

Now the first hard part:  take a scope photo, and with eyeball or
planimeter INTEGRATE the area of the pulse on the screen.  This gives
the number of Volts*Seconds "stored" in the inductor.  Be sure to
count the negative rings as negative area.

Now, assume that the residual resistance is constant (not a great
assumption because of skin effect) and subtract the area of the
residual voltage times the time the unshorted pulse would be on
screen (say the residual is 20 mV, and the pulse is on screen for
4 nsec, the residual is 80 picovolt-seconds).  


If you started with, say a 2 volt pulse into the scope, you should
have a number on the order of 1000 pico-volt seconds.  Use the following
formula:

     L = (Volt seconds)*(25 ohms)/(Original step voltage)

Then, short the test fixture with a short, fat wire (less than 0.1 inch)
and see how much residual signal makes it through.  There shouldn't
be much;  you should only be seeing the inductance of the short wire.
You will want to measure this and subtract it from the measurement on
the package, by same technique.

------
This technique should give an approximate number (20%???)  for package
inductance.  As I am extrapolating from measurements we normally
perform with much faster gear, there may be some factors I am ignoring.

Good Luck!









-- 
Keith Lofstrom   ...!tektronix!vice!keithl   keithl@vice.TEK.COM
MS 59-316, Tektronix, PO 500, Beaverton OR 97077  (503)-627-4052

flaig@cit-vlsi.Caltech.Edu (Charles M. Flaig) (03/17/88)

In article <1872@mips.mips.COM> mark@mips.COM (Mark G. Johnson) writes:
>
>I have a problem.  I'm trying to measure the inductance of a
>gate-array (IC pin + package trace + bondwire), i.e. the total
>inductance between the ground plane of my printed circuit board and
>the on-chip ground metallization inside my gate-array IC.

[explains he tried ringing a tank circuit, didn't work]

Well, you could try to find the delay of an LC circuit (if you have a fast
enough rise/fall time for your input waveform):

--------             --------------
Square |_____________| Package    |____________ Delayed waveform
Wave   |       |     | Inductance |     |       
--------       |     --------------     |
               |        10-30nH       __|__
               |                      _____ 100pf + Cscope
               V                        |
            Original                  __|__
            waveform                  / / /

After subtracting out the RC delay you should be left with the LC delay,
and be able to calculate L.  If necessary, you could put several package
and capacitor stages in series for longer delays but messier calculations.
I don't remember what the formula for LC delay is, but any electromagnetics
text should have it.

______________________________________________________________________________
  ___   ,               ,                                           ,;,;;;,
 /   Y /|              /|              Charles Flaig                ;/@-@\;
|      |/     __, ,__  |/              flaig@csvax.caltech.edu       | ^ |
|      /^\   /  | | |  /  /\  /\                                      \=/ 
 \____/|  \_/|_/\_/ \_/ \_\/_/_/_/     "What, you think they PAY me for this?"