[sci.electronics] References & Suggestions needed for simple 24-bit frame buffer

lansd@eecg.toronto.edu (Robert Lansdale) (03/07/89)

	I am contemplating whether to build a 24-bit graphics 
frame buffer for my multi-processor DSP system or just use an IBM
VGA card for graphics output. 

	All I need if a very dumb frame buffer, say 512x512,  or if
memory prices come down soon, 1024x768, with no graphics processor
or cpu support. The buffer would be controlled instead by the 68000
host that resides on the DSP bus, upon which the frame buffer would
reside. Cost is no concern (for memory), but complexity is (I don't
have much time to construct it). I have no intent on buying an 
existing frame buffer (ie: fancy MATROX boards with 34010's on them).

	From some quick calculations, I could probably get by with
4 banks of interleaved 256kx24-bit 120ns DRAMs (I don't need VRAM
capability) which have 70ns column access capabilities. The scanlines
would be read out in column access mode, and the 68000 could write to
the memory in DRAM random access mode during the Hsync and Vsync intervals
(writing would be slow, but this is not important).

	What I need help with is what video controller chip I can
go with:

	TMS34010	- Too complex. I don't need the programming
				capabilities.
	TMS34061	- Only 16 bits. I don't know if they work
				as three-somes.
	Hitachi ??	- Only 16 bits. Wants to do everything on
				4-bit pixels.
	Intel ??	- Only 16 bits. Too complex.
	MC6845		- I could use this for a 512x512 pixel display,
  			  but it can't address more than 512k memory.

	An alternative to using an existing chip would be to design
my own controller (YUCK! Double YUCK when using DRAMs!). Steve Ciarcia
used a simple 8254 timer to create the HSYNC and VYSNC timing intervals
for his ImageWise Digitizer, which is not a bad idea, but I would still
have to come up with the nasty interleaving and access circuitry for
the DRAM (something I can probably do, but I don't have time for at the
moment).

	As for the analog end of things, I've been told that Brooktree
manufactures 24in-24out video DACs that can handle 40 or 60Mhz data
streams. I'll probably go with them unless someone can point out another
source of good video DACs.

	Does anyone know of any articles relating to 24-bit frame buffer
hardware construction? I've scanned through ESD, VLSI Design and Electronics
Design and only came up with design articles for 4/8-bit pixel boards
using the new video controller chips (Intel, Hitachi, etc). Since such
DIY articles probably don't exist, anything relating to frame buffer
construction would come in handy.

	And while I'm asking, does anyone have timing specs for VGA,
SuperVGA and/or 8514 (1024x768)? I need the scanning frequencies,
HSYNC, VYSNC and blanking intervals, etc.

-- 
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Electrical Engineering Computer Group, University of Toronto.