mcmiller@uokmax.UUCP (Michael C Miller) (04/08/89)
I am very interested in knowing the exact method for pairity checking in an AT. My board ( dtk 12MHz) uses 74s280's in the memory area. They should be fast enough to produce a parity bit at each write and read but how do they tell the system of errors. How do they correct? I understand odd /even parity concepts at a basic level. Is it as simple as this on the AT's? What are other possible hardware implementations for parity checking? Assuming good,fast memory chips,where can errors originate onthe motherboard? Thanks... sans