[sci.electronics] ground bounce

phil@diablo.amd.com (10/13/89)

AMD has an application brief titled "Minimization of Ground Bounce
Through Output Edge-Rate Control", Publication# 10181. 

Our literature department will send it to you if you call:
	800 538 8450, or
	408 732 2400,
	x42264

I am not posting this on behalf of AMD but as a reader of
sci.electronics who wanted to share this with the other readers. 

--
Phil Ngai, phil@diablo.amd.com		{uunet,decwrl,ucbvax}!amdcad!phil
Just say NO to the "War on Drugs".

mark@mips.COM (Mark G. Johnson) (10/19/89)

In article <27746@amdcad.AMD.COM> phil@diablo.amd.com (Phil Ngai) writes:
   >
   >AMD has an application brief titled "Minimization of Ground Bounce
   >Through Output Edge-Rate Control", Publication# 10181. 
   >
   > [Phil is] ... posting this ... as a reader of sci.electronics who
   > wanted to share this with the other readers. 


Thanks, Phil, for supplying the pointer above.  However, in my humble
opinion the AMD brief is rather incomplete.  There are other, better,
sources of information on ground bounce:

[1] IDT High Performance CMOS Databook (volume 1 of 2), Application
    and Technical notes, chapter 14.
		"FCT - Fast, CMOS, TTL-Compatible Logic", pp. 14-209..250

[2] EDN magazine, "EDN's advanced CMOS logic ground-bounce tests",
    March 2 1989 issue, pp. 88-114.   {interestingly, some IDT devices
    didn't do well despite their excellent explanations contained in
    reference [1] !!}

[3] Texas Instruments, "Advanced CMOS Logic Designer's Handbook",
    rearcover #SCAA001A.  All of chapters 3 and 4 are good, but the
    best part is page 1-4 and 1-5 (Table 1.1-1 and Figure 1.1-1),
    where they give pin inductance vs pin position for several package
    types.

[4] EDN Magazine, "Equivalent circuits model subtle traits of advanced
    CMOS IC's", by Charles Dike of Signetics Corp.  April 14 1988 issue,
    also available from Signetics.
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
	(408) 991-0208    mark@mips.com  {or ...!decwrl!mips!mark}

john@anasaz.UUCP (John Moore) (10/20/89)

In article <29700@obiwan.mips.COM> mark@mips.COM (Mark G. Johnson) writes:
>In article <27746@amdcad.AMD.COM> phil@diablo.amd.com (Phil Ngai) writes:
>   >
>   >AMD has an application brief titled "Minimization of Ground Bounce
							  ^^^^^^^^^^^^^
>   >Through Output Edge-Rate Control", Publication# 10181. 

Presumably AMD was thus well prepared for the earthquake! ;>)

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phil@diablo.amd.com (Phil Ngai) (10/24/89)

In article <809@anasaz.UUCP> john@anasaz.UUCP (John Moore) writes:
|>In article <27746@amdcad.AMD.COM> phil@diablo.amd.com (Phil Ngai) writes:
|>AMD has an application brief titled "Minimization of Ground Bounce
|
|Presumably AMD was thus well prepared for the earthquake! ;>)

According to AMD's PR person, semiconductor fabrication is very
sensitive to vibrations and the modifications made to the buildings to
control vibrations also made them strong enough to handle the
earthquake and there was no damage. 

I don't think I'll comment on this beyond saying that I am not
speaking for the company. 


--
Phil Ngai, phil@diablo.amd.com		{uunet,decwrl,ucbvax}!amdcad!phil
Just say NO to the "War on Drugs".