fmgst@unix.cis.pitt.edu (Filip G.) (02/28/90)
I once read an article, in BYTE I think, that described SLAMS, or Scan Line A???? Memory. Basicly, the concept was to make a memory chip that was to make access to a single scan-line much faster than usual schemes of using 2-port ram or standard RAM. Very promising for high speed systems but I have not heard of it SINCE. Anyone have any new info on the subject? fmgst@unix.cis.pitt.edu -- _______________________________________________________________________________ "The FORCE will be with you. Always." It *IS* with me and has been for 8 years. Filip Gieszczykiewicz "..of future fame...." FMGST@PITTVMS or fmgst@unix.cis.pittsburgh.edu
henry@utzoo.uucp (Henry Spencer) (03/03/90)
In article <22602@unix.cis.pitt.edu> fmgst@unix.cis.pitt.edu (Filip G.) writes: > I once read an article, in BYTE I think, that described > SLAMS, or Scan Line A???? Memory. Basicly, the concept was > to make a memory chip that was to make access to a > single scan-line much faster than usual schemes of > using 2-port ram or standard RAM. Very promising for > high speed systems but I have not heard of it SINCE. This sounds much like VRAMs, which are standard production items now. These are DRAMs plus an on-chip shift register that can be loaded from a row of DRAM data in one operation and then clocked out serially at high speed. Much used for video displays (that's what the V is) and also getting attention for memory systems for fast processors (which often do sequential reads for things like cache fills). -- MSDOS, abbrev: Maybe SomeDay | Henry Spencer at U of Toronto Zoology an Operating System. | uunet!attcan!utzoo!henry henry@zoo.toronto.edu
dnelson@mthvax.cs.miami.edu (Dru Nelson) (03/04/90)
>> I once read an article, in BYTE I think, that described >> SLAMS, or Scan Line A???? Memory. Basicly, the concept was >This sounds much like VRAMs, which are standard production items now. No, it was a ram chip design that had built in low level graphics functions. He discussed vrams in his article, though. The chip was an interesting design and I can't say I remember the details but these video chips would do functions for polygons and half-toning in the chip quickly. The person designed it while he was a student at Stanford University and made it with MOSIS. The article described how it would signifigantly speed graphics. The last I saw of this was in the Byte article. The article did state that several semiconductor companies showed interest in the chip design. -- %% Dru Nelson %% Miami, FL %% Internet: dnelson@mthvax.cs.miami.edu %%