billk@hpsad.HP.COM (Bill Katz) (04/06/90)
Take a look at the TI 34010. While it's quite a bit more than just
a VRAM controller, it seems to do that job rather well, and it can draw
besides. National also has a VRAM controller, the DP8520/DP8521. It is
a variant of their normal DRAM controller, the DP8420/DP8421. Get the
"Advanced Peripherals-Graphics Handbook" for the National Chip. Hope this
helps.
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______________________________________________________________________________bill@videovax.tv.tek.com (William K. McFadden) (04/06/90)
In article <19275@boulder.Colorado.EDU> rainer@hibachi.colorado.edu (Rainer Malzbender) writes: >Here's another one: anybody know of a chip to facilitate using >video RAM's ? I've been using 41264's (64K x 4) and have always designed >my own logic to generate the serial out timing and CPU/video arbitration. >This gets quite messy fast. You have to mux RAS and CAS between the >shift register load cycles and the CPU access, among other things. I once did a design using the Signetics 74F764-1 dual-ported DRAM controller. The part is made to allow two processors to share some DRAMs, but I was able to use my video controller instead of a second processor. Although the 74F764 doesn't put out the DT/OE signal needed by video RAMs to differentiate between normal and data transfer accesses, its timing signals contain enough information to derive DT/OE. The chip contains a built-in address MUX for 256K X 1 or 256K X 4 DRAMs. Of course, you can use smaller DRAMs by leaving out the unused address lines. It generates its own refersh at any rate you choose. Also the horizontal rate is variable, because you supply it from your video controller (I did my own video controller). BTW, I have made it work with memories of two different sizes (256K X 4 main RAM and 64K X 4 video RAM on the same bus). The trick was to make a separate address MUX for the video RAMs, which you have to do anyway, because the chip contains a 3:1 MUX, not the 5:1 MUX you would need for video RAM (one if the MUX inputs comes from the RAS-only refresh counter). Anyway, the chip provides all the timings you need to do this. If you want to use the chip, please be aware of some considerations. First off, use the -1 suffix part. The output drivers of the non suffix part are too fast and ground bounce may occasionally cause the part to fail. It took me weeks to figure this out. Be aware, however, the -1 suffix has a slightly different timing on one of its outputs (it's a long story). If you want the same timing as the non-suffix part, use the 74F1764-1. It is the same as the 74F764-1, but with an extra address line for 1M X 1 or 1M X 4 parts. While I'm on the subject of the 1764, let me say it is a much better part because there are more Vcc and GND pins, which also reduce ground bounce. Next, don't use the 74F765 (or 74F1765) series parts. They don't have an address latch, and during a data transfer (when you're using an external MUX), changing address inputs from the CPU causes the part to get confused. This only occurs if you're using both the internal MUX for main RAM and an external MUX for video RAM. If you don't use the built-in mux, most of these problems go away. The 764 (1764) series have address latches that eliminate this problem. Yes, it took me another couple of weeks to figure this out. Lastly, the parts have a bug in them that will generate improper RAS precharge timings if you're not careful. In most cases you won't see this, but since I was using a video controller instead of another CPU, the problem occurred. The problem is: after an access has completed, you have to continue holding the REQ line low until the RAS precharge time has completed. The DRAM controller won't do it for you. I fixed it with a couple of flip-flops. You could also use a one-shot to generate the time delay. Once again, it took me a couple of weeks to figure this out (and Signetics isn't going to fix it, because the problem only occurs in a few applications). After all these problems, you might be wondering why I even bothered to use this part at all. First, I was motivated to make it work because, even with the extra glue logic, it replaced a dozen or more ICs, making it possible to add another 8 DRAMs to my circuit. Second, all of the problems I had were due to my unconventional use of the part-- the designer himself admitted the part was never designed with video RAMs in mind. Actually, the Signetics DRAM controllers are pretty easy to use-- once you know the secret. Let me conclude by recommending the 74F1764-1 for your application, or the 74F764-1, which you'd have to run slightly slower, because of the funny timings. I could send you a schematic if you're interested in my implementation. Good luck on your design! -- Bill McFadden Tektronix, Inc. P.O. Box 500 MS 58-639 Beaverton, OR 97077 bill@videovax.tv.tek.com, {hplabs,uw-beaver,decvax}!tektronix!videovax!bill Phone: (503) 627-6920 "The biggest difference between developing a missle component and a toy is the 'cost constraint.'" -- John Anderson, Engineer, TI