tts@ttank.UUCP (Karl Bunch) (04/12/90)
Just a novice question here.. I would like to build a parallel printer buffer. I have several megs in 64k memory chips and would love to build a nice buffer as a project. I really would rather build a 256k buffer (Don't ask why so large) but don't want to wire that many 64k chips together! :-) Maybe I could use two 1Meg chips and store one nibble in each chip? Would static ram be easier to implement? If so are the prices inhibitive? The biggest thing I want to do is get the fastest turn-around on the parallel line from the host. Hopefully the design will allow the host to burst the output without using interrupts. (This is a Xenix System) So, the big question.. Where can I find some designs that would be useful or even just manuals I can use to piece it all together. Any input would be helpful.. Just would like to avoid the normal liquid nitrogen comments.. ;-) Karl Bunch root%ttank@ucrmath.edu
henry@utzoo.uucp (Henry Spencer) (04/13/90)
In article <26@ttank.UUCP> tts@ttank.UUCP (Karl Bunch) writes: >Would static ram be easier to implement? If so are the prices >inhibitive? Static RAM is *considerably* easier to deal with. (Compare the timing diagrams if you want an initial notion of the difference!) DRAMs are meant for people who are willing to undergo substantial pain to get maximum density and minimum price per bit. -- With features like this, | Henry Spencer at U of Toronto Zoology who needs bugs? | uunet!attcan!utzoo!henry henry@zoo.toronto.edu