[sci.electronics] deglitching the deglitcher

whit@milton.u.washington.edu (John Whitmore) (06/28/90)

In article <3836@newton.physics.purdue.edu> piner@newton.physics.purdue.edu (Richard Piner) writes:
>Here's an interesting problem for you all. I have a new 16 D/A converter
>board that is supposed to be deglitched. The company that made it
>used a AD585 sample and hold amplifier as the deglitcher. Unfortunately,
>this chip puts out a 50 mV glitch when it switches from sample to hold.
>Given that the step size of a 16 bit board is is about 0.3 mV...

	All switches have some residual charge transfer, and a spike on
a sample/hold circuit is normal.  CMOS switches have TWO spikes, but...
a constant-size glitch during the sample/hold transition shouldn't
hurt; after all, it's ALWAYS there, so it calibrates out.
	My Analog Devices databook specifies the AD585 as having 3.0 mV
(MAXIMUM absolute value) sample/hold voltage change.  Your device
is not meeting its specifications.  Perhaps you should just buy a new
one.  Alternately, you might want to experiment with adding bypass
capacitors and signal-conditioning the logic input signals.  It is
possible that you are seeing a power-supply spike that is induced by the
sample/hold logic, and simply bypassing the analog power to ground
(pin 4 to pin 6 and pin 11 to pin 6) might get rid of the problem.
A third possibility: pin 7 is directly connected to the hold
capacitor.  It could conceivably be picking up a signal by capacitive
coupling on the circuit board (slowing the slew rate on the sample
logic input could reduce this).
	If the problem doesn't go away, contact Analog Devices' local
sales representative; this company has a good reputation for field
support (i.e. they might be nice and work on the problem for you).

	Good luck.
			

I am known for my brilliance,             John Whitmore
 by those who do not know me well.