hitch@northstar58 (Charles Y. Hitchcock III) (08/14/90)
I have come to believe that plugging in a (CMOS) chip into a powered socket can potentially damage the chip. After all, doesn't AT&T use special technology to let them hot-swap a board in a telephone switching system? Now that I have an application where I want to insert and remove a chip into/from a powered socket, I am hard- pressed to explain what electrical phenomena would occur that could do damage. Is hot-swapping a chip a bad idea? Why? What do commercial chip test systems do?
jws@thumper.mlb.semi.harris.com (James W. Swonger) (08/14/90)
In article <23655@dartvax.Dartmouth.EDU> charles.hitchcock@dartmouth.edu (Charlie Hitchcock) writes: > >Is hot-swapping a chip a bad idea? Why? What do >commercial chip test systems do? Yes. Some circuits can be damaged and you won't know if yours are susceptible until you try. Test programs float all pins for insertion and then power up the part. All bulk CMOS ICs have four-layer devices (i.e. parasitic SCRs) present due to the way they are fabricated. A phenomenon referred to as "latchup", the activation of the SCR, can be triggered by power supply spikes and other anomalous operating conditions. Once the SCR is on, you have a Vdd-Vss short which gets worse (runs away) until the cip is thermally damaged. This effect is dependent on the process and layout of the part in question. Some suppliers take measures to eliminate the latchup paths or reduce the sensitivity of the parasitic SCR.
gsteckel@vergil.East.Sun.COM (Geoff Steckel - Sun BOS Software) (08/15/90)
In article <23655@dartvax.Dartmouth.EDU> charles.hitchcock@dartmouth.edu (Charlie Hitchcock) writes: > >I have come to believe that plugging in a (CMOS) chip >into a powered socket can potentially damage the chip. >After all, doesn't AT&T use special technology to let >them hot-swap a board in a telephone switching system? > >Now that I have an application where I want to insert >and remove a chip into/from a powered socket, I am hard- >pressed to explain what electrical phenomena would occur >that could do damage. > >Is hot-swapping a chip a bad idea? Why? What do >commercial chip test systems do? Those expert in the art please correct details... There are several possible results of plugging a chip into a "hot" socket, mostly as a result of connecting Vee (ground) and I/O before Vcc (+5): (I've destroyed chips in all these fashions). 1) Mostly a problem for bipolar chips: if an input and ground are connected before VCC, the input-to-VCC spec can be exceeded, damaging the input structure. LSTTL is fairly immune, but naked emitter inputs of old TTL would blow easily. I don't know about the base inputs (PNP or NPN) of some of the 74F and 74AS parts. (I haven't tried this experiment lately!) 2) Mostly a problem for CMOS chips: if an output is raised above VCC to a low impedance source, parasitic diodes can start sinking current. In many CMOS processes, one of the output transistors has a parasitic PNPN (otherwise known as a SCR) path to the substrate. When power is applied to VCC, this SCR is already on, shorting the power to ground via the chip substrate. This was and is a problem with analog multiplexor chips where input voltages are hard to constrain - protection circuitry that doesn't degrade normal operation is hard to design unless the process uses dielectric isolation (expensive). This behavior is one type of `latch-up'. 3) Not quite the same problem, but if VCC is shorted to ground (as in an unpowered board being inserted; the decoupling caps provide a low impedance VCC-VEE), applying a low impedance voltage source to a bipolar output can cause (a slightly different form of) latch-up as well. There are other problems with analog circuitry. geoff steckel (gwes@wjh12.harvard.EDU) (...!husc6!wjh12!omnivore!gws) Disclaimer: I am not affiliated with Sun Microsystems, despite the From: line. This posting is entirely the author's responsibility.
henry@zoo.toronto.edu (Henry Spencer) (08/15/90)
In article <23655@dartvax.Dartmouth.EDU> charles.hitchcock@dartmouth.edu (Charlie Hitchcock) writes: >Now that I have an application where I want to insert >and remove a chip into/from a powered socket, I am hard- >pressed to explain what electrical phenomena would occur >that could do damage. The main problem is that many ICs respond badly to seeing voltages on signal pins that are outside the range [power-pin voltage, ground-pin voltage], and it's very hard to guarantee that those two pins will connect first and disconnect last. In particular, CMOS can be triggered into "latchup", essentially a self-destruct mode inadvertently built into the chip :-). A consequence of the standard CMOS processes is parasitic bipolar devices here and there, which form [gulp] an SCR connected between power and ground. Normally the gate of the SCR is reverse-biased, so to speak, and the SCR never conducts. Hit an input pin with a voltage outside the power-ground range, and you may trigger it... at which point the chip challenges your power supply to a duel, and usually loses. :-) Equipment built for hot swapping typically uses oddball connectors to ensure that power and ground always make first and break last. There are also potential problems with static electricity and the like. >What do commercial chip test systems do? They normally have enough sophistication in their socket drivers that they can power the entire socket down for insertion and removal, I think. -- It is not possible to both understand | Henry Spencer at U of Toronto Zoology and appreciate Intel CPUs. -D.Wolfskill| henry@zoo.toronto.edu utzoo!henry