[sci.electronics] Advice needed on wire-wrapping CPU based circuits

kevin@horizon.COM (Kevin Criqui) (08/31/90)

I'm in the process of prototyping a small computer with a MC68000, some
EPROM, a duart and (hopefully), 8 megs of DRAM.  I've wire-wrapped the
circuit on a piece of perf board.  In trying to get the DRAM controller
working, I found that the 8 MHz system clock is quite noisy.  In fact,
if I look closely on the scope, I can see an occasional pulse of 2-2.5
volts during the time when the clock should be low.  The logic analyzer
confirms this, showing occasional glitches on the clock line.  I'm
fairly certain these glitches are causing the troubles I'm having with
the DRAM controller (a National Semiconductor 8421A).

I've tried beefing up the power and gound lines and have made sure
there are 0.1 uF bypass caps on all the chips with almost no luck.
Does anyone out there have any advice for me?  If you've successfully
wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
like to hear how you did it.

	_kevin

   |  Kevin Criqui                           kevin@horizon.com  |
   |  Science Horizons, Inc.           ...hp-sdd!horizon!kevin  | 
   |  710 Encinitas Blvd. #200               (619)942-7333 (w)  |
   |  Encinitas, CA  92024                   (619)942-1652 FAX  |

rainer@boulder.Colorado.EDU (Rainer Malzbender) (09/01/90)

In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>  ...
>working, I found that the 8 MHz system clock is quite noisy. 
>  ...
>Does anyone out there have any advice for me?  If you've successfully
>wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
>like to hear how you did it.

Gosh, I don't know. I've wire-wrapped quite a few 68K circuits of the
type you describe, and although I've had ugly looking clock signals,
that never turned out to be the cause of any bugs. It was always some
miswrapped wire or other. Be careful about distributing the clock - I
use monolithic oscillators and then buffer the clock with complementary
drivers (265) or inverters since usually I need two phases anyway. A
friend showed me a nice way to do power distribution, which may help:
take PCB board stock, cut into little strips about 1/4" wide by several
inches long. Then attach wire wrap pins (T44), about one every inch,
alternating sides (make a little jig out of two pieces of perfboard spaced
about 1/2" to align the pins and hold them in place while soldering).
Finally, get a bag full of cheapo disc capacitors and solder them on to
the strips, one every inch or two. The final assembly just plugs into
your perfboard (pads per hole are best) and decoupling caps are already
mounted. You can whip these up in no time at all. The only drawback is that
the decoupling caps could be closer to the chips, but it's always
worked for me.

More than likely your problem has to do with violating some timing
requirement of the DRAM controller or the DRAMs themselves.
--
Rainer M. Malzbender                          Technology recapitulates biology.
Dept. of Physics                (303)492-6829       rainer@hibachi.colorado.edu 
U. of Colorado, Boulder, USA                  malzbender%opus@vaxf.colorado.edu

scott@pita.cns.ucla.edu (Scott Burris) (09/01/90)

In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>
>I'm in the process of prototyping a small computer with a MC68000, some
>EPROM, a duart and (hopefully), 8 megs of DRAM.  I've wire-wrapped the
>circuit on a piece of perf board.  In trying to get the DRAM controller
>working, I found that the 8 MHz system clock is quite noisy.  In fact,
>if I look closely on the scope, I can see an occasional pulse of 2-2.5
>volts during the time when the clock should be low.  The logic analyzer
>confirms this, showing occasional glitches on the clock line.  I'm
>fairly certain these glitches are causing the troubles I'm having with
>the DRAM controller (a National Semiconductor 8421A).
>
>I've tried beefing up the power and gound lines and have made sure
>there are 0.1 uF bypass caps on all the chips with almost no luck.
>Does anyone out there have any advice for me?  If you've successfully
>wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
>like to hear how you did it.
>

I've put together a number of wire wrap boards with MC68000 and MC68020
CPU chips with up to 4 Meg of memory running at clock rates up to 12.5 Mhz.
I used to have a lot of problems getting the memory array to work reliably.
The clock glitches are a new one on me.  I used to use a XTAL Osc plugged into
a 14 pin socket with the output going to a 74S04 inverter.  The output of the
inverter was always what was used as the master clock source.
As far as wire wrapped memory arrays go, I've had luck with the following:

Organize the array as 9 chips by N, where N is 2, 4, etc depending on memory
size.  On the wirewrap side of the board, run power and ground lines to each
set of 9 chips.  Stick 0.1uf mono ceramic caps at least every 2 chips.  Stick
bigger tantalum electrolytic caps at each side of each set of 9 chips.
Wire wrap across the power and ground busses forming a complete grid of
power.  Use 22 ohm resistors from the DRAM address mux to the address lines.
Generally, this has worked pretty well.  This assumes you're using DIP's for
the memory.  I've also experimented wrapping to SIMM sockets and have found
that the SIMM's seem to be more forgiving of noisy environments.

On the historical side of things, back in 1977 (I think) I used to have
a 16K dynamic memory boards using 4KX1 chips for my Altair 8800b computer.
In order to get it to work reliably, I taped aluminum foil to both sides
of the memory board (insulating it of course), and grounded it.  Worked
like a charm.




until
--
----------
Scott Burris
UCLA Campus Network Services
cnetslb@oac.ucla.edu (213) 206-4860

markz@ssc.UUCP (Mark Zenier) (09/03/90)

In article <1019@lee.SEAS.UCLA.EDU>, scott@pita.cns.ucla.edu (Scott Burris) writes:
> On the historical side of things, back in 1977 (I think) I used to have
> a 16K dynamic memory boards using 4KX1 chips for my Altair 8800b computer.
> In order to get it to work reliably, I taped aluminum foil to both sides
> of the memory board (insulating it of course), and grounded it.  Worked
> like a charm.

3M makes copper foil tapes.  The neat thing is that they are set up
to be conductive through the adhesive. (Thanks to the responders to
my net query last year)

part 1181 is a bare copper with metal particles in the adhesive.
part 1345 is tinned copper with a quilted embossing.

I prefer 1345, but use 1181 because that what the local distributor
has in stock.  (Advance Group a.k.a. Advance Wire and Cable, but
they have a pretty high minimum, around $50).

Mouser and DigiKey have a limited selection (I think 1181).

I use this to lay out a grid around the wirewrap sockets, and for some 
power supply busses.

markz@ssc.uucp

grc@stl.stc.co.uk (Gary Cook) (09/03/90)

In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>
>I'm in the process of prototyping a small computer with a MC68000, some
>EPROM, a duart and (hopefully), 8 megs of DRAM.  I've wire-wrapped the
>circuit on a piece of perf board.  In trying to get the DRAM controller
>working, I found that the 8 MHz system clock is quite noisy.  In fact,
>if I look closely on the scope, I can see an occasional pulse of 2-2.5
>volts during the time when the clock should be low.  The logic analyzer
>confirms this, showing occasional glitches on the clock line.  I'm
>fairly certain these glitches are causing the troubles I'm having with
>the DRAM controller (a National Semiconductor 8421A).
>
>I've tried beefing up the power and gound lines and have made sure
>there are 0.1 uF bypass caps on all the chips with almost no luck.
>Does anyone out there have any advice for me?  If you've successfully
>wire wrapped a CPU based circuit that ran at 8 MHz (or higher), I'd
>like to hear how you did it.
>
>	_kevin
>
>   |  Kevin Criqui                           kevin@horizon.com  |
>   |  Science Horizons, Inc.           ...hp-sdd!horizon!kevin  | 
>   |  710 Encinitas Blvd. #200               (619)942-7333 (w)  |
>   |  Encinitas, CA  92024                   (619)942-1652 FAX  |


I have had experience with 12.5 Mhz wire-wrapped circuits. The clock line
was badly distorted and did cause problems. We had to use seperate twisted
ground-signal pair runs for the clock, and in some cases try to terminate
the end of the run to prevent reflections.

We also had to seperate the clocks driving TTL from those driving the EPLDs, 
as the EPLDs tend to mess up the clock.

Our technicians wire-wrap in neat busses, wrapping around the edges of chips
etc., this makes for pretty wire-wrapping but I think to avoid cross-talk 
effects a rats-nest approach would be better (ie point-point taking shortest
route.)

Luckily we have converted all of out boards now to PCB, and I don't think 
we'll use wire-wrap again.

Good luck with your debugging.

GRC. 
 



| Gary Cook  ,        | Tel: 044 279 29531 ext 2615 | There's lies, damn      |
| STC Technology Ltd, | e-mail: grc@stl.stc.co.uk   | lies and statistics.    |
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josip@ra.src.umd.edu (Josip Loncaric) (09/03/90)

In article <3344@stl.stc.co.uk> grc@larch.UUCP (Gary Cook) writes:
>In article <409@horizon.COM> kevin@horizon.COM (Kevin Criqui) writes:
>>
>>I'm in the process of prototyping a small computer with a MC68000, some
>>EPROM, a duart and (hopefully), 8 megs of DRAM.  I've wire-wrapped the
>>circuit on a piece of perf board.  In trying to get the DRAM controller
...
One thing I've been told in the past is that you should be careful and
avoid wrapping the insulated portion of the wire around the pin.  This
precaution is important, because otherwise you are essentially creating
small inductors at each end of your wire.

Another "rule-of-thumb" for high-frequency circuits is that point-to-point
wireing works better (less crosstalk etc.) than neat wireing jobs.

Labs I've worked in have had no wirewrapping related problems with fairly
simple circuits operating at up to 20MHz, and presumably the "rules" 
mentioned above deserve some credit.


--
Josip Loncaric / SRC / U. of Maryland / <josip@ra.src.umd.edu>
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