[sci.electronics] Generating test-vectors for asynchronous circuits

wsineel@wsooti04.info.win.tue.nl (Eelco Vriezekolk) (10/17/90)

I have a question which I can not answer after extensive
library sessions.

The question is whether algorithms for generation of
test-vectors (stimuli) for combinatorial circuits (in
particular Roth's D-algorithm) can be used for asynchronous
circuits as well.
I am not concerned about races and hazards (delay insensitive
circuits are used).

Is this possible? Are there any specific problems?
Do you know good references to proceedings or books? 


Thanks in advance.


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Eelco Vriezekolk, wsineel@win.tue.nl
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