gonzalez@bbn.com (Jim Gonzalez) (11/14/90)
I am in the process of getting a Northstar HSIO (serial interface) board working on a Cromemco System Three (S-100 bus with a Z-80). The CPU board apparently produces a 4MHz clock, while the serial board expects to be clocked at 2MHz. I could adjust the baud rate specification by a factor of 2 (yielding 1200 baud when I tell it to run at 600, for example), except the 8251 is only rated to run up to 2.4MHz. The 8251A is rated for a maximum of 3MHz, so a chip upgrade won't help either. Des anyone know if there is a faster version of the 8251 available? My information comes from the 1987 ediiton of an Advanced Micro Devices data book. The part must be a drop-in; if I have to do any cutting I may as well just build a new board. -Jim.
rhaar@rcsrlh.GMR.COM (Bob Haar CS50) (11/14/90)
In article <60822@bbn.BBN.COM>, gonzalez@bbn.com (Jim Gonzalez) writes: |> I am in the process of getting a Northstar HSIO (serial interface) board |> working on a Cromemco System Three (S-100 bus with a Z-80). The CPU board |> apparently produces a 4MHz clock, while the serial board expects to be |> clocked at 2MHz. I could adjust the baud rate specification by a factor |> of 2 (yielding 1200 baud when I tell it to run at 600, for example), except |> the 8251 is only rated to run up to 2.4MHz. I am not familiar with the Cromemco system 3 board, but try to get a listing of it's bus signals. Many of the 4 and 6 MHz Z-80 CPU boards for S-100 systems used one of the "unassigned" pins for an alternate clock. This is because many peripheral cards needed a 2 MHz clock. If there is one, just jumper the clock input to that bus pin. Bob Haar CSNET: HAAR@GMR.COM UUCP: uunet!edsews!rphroy!rcsrlh!rhaar Computer Science Dept., G.M. Research Laboratories DISCLAIMER: Unless indicated otherwise, everything in this note is personal opinion, not an official statement of General Motors Corp.
bjork@NISC.SRI.COM (Steve Bjork) (11/15/90)
In article <60822@bbn.BBN.COM> gonzalez@vax.bbn.com (Jim Gonzalez) writes: >working on a Cromemco System Three (S-100 bus with a Z-80). The CPU board >apparently produces a 4MHz clock, while the serial board expects to be The CPU chip is clocked at 4 or 2 mhz, depending on the switch setting on the ZPU. There is a constant two megahertz clock available on bus (pin 49 or so). I've cut the trace from the middle of the board and run wires to this pin on Many IMSAI SIO-2's to run them in a ZPU system. So, just get the knife and soldering iron out, and Hack! --Steven
winans@milo.mcs.anl.gov (John Winans) (11/17/90)
In article <60822@bbn.BBN.COM> gonzalez@vax.bbn.com (Jim Gonzalez) writes: >I am in the process of getting a Northstar HSIO (serial interface) board >working on a Cromemco System Three (S-100 bus with a Z-80). The CPU board >apparently produces a 4MHz clock, while the serial board expects to be >clocked at 2MHz. I could adjust the baud rate specification by a factor >of 2 (yielding 1200 baud when I tell it to run at 600, for example), except >the 8251 is only rated to run up to 2.4MHz. The 8251A is rated for a >maximum of 3MHz, so a chip upgrade won't help either. > >Des anyone know if there is a faster version of the 8251 available? My >information comes from the 1987 ediiton of an Advanced Micro Devices data >book. The part must be a drop-in; if I have to do any cutting I may as >well just build a new board. Hmmm... I think you are confusing the need for a clock on the 8251 with the system clock that runs the CPU. There need be no relationship between the clock line on an 8251 and the system clock. So you could just divide your 4 MHz clock to 2 and use it for the 8251 clock line. The only thing you have to worry about is that the system clock be some X number of times faster than the bit rate clock (I think this depends on if you are using 1X 16X or 64X clocks on the bit rate clock.) In any event, I have used many an 8251A on 4MHz Z80s and what I do is set up a 2.4576 MHz clock and feed it to a 74LS191 and divide it by 16 for a 9600 X 16 bit rate clock. And I just run the 2.4576MHz directly to the 8251 clock line. Other things that you have to think about are the acess times on the 8251, and what I think intel refers to as the 'recovery time between writes'. The access times on the 8251A are within the Z80A's access times. Remember that the Z80 sits there for 2 entire system clock periods while waiting for a memory access to finish. For a memory read the RD line is active for 500 ns. And a write will hold the WR line for only 250ns. The data setup time for the write is 250ns too. If you put the thing on an I/O port address you have 3 clock periods!! For both IN and OUT instructions. Looking at the wave forms for the OUT looks like the setup time is a tad skimpy compared to the memory write, but I've run mine on ports w/no problems. I'm pretty sure that the 'recovery time...' was too long to use an outir instruction to init the thing, but you only do that once anyway and the rest of the time you usually end up running other instructions between successive accesses to the thing anyway. So this is not a problem either. Since you are running on an S-100 bus, you might have a look at how MWRITE is generated because its duration could shrink. If your data is going thru 2 LS244s on the way to and fro the 8251s your data will be delayed 36ns on the way! Make sure your MWRITE is similarly delayed too. (this should not be a problem if they are on I/O ports.) By the way, I am not familiar with your serial board, but I would doubt that it is using the 2MHz clock for any part of the bit rate clock generator circuit because there is no sane divisor that could yeild a normal baud rate. I'd bet that you will find an onboard clock for that so you will not have to make adjustments to your bit rate settings. -- ! John Winans Advanced Computing Research Facility ! ! winans@mcs.anl.gov Argonne National Laboratory, Illinois ! ! ! !"The large print giveth, and the small print taketh away"-- Tom Waits !