[sci.electronics] Crstal oscillator load capacitance

moss () (12/22/90)

When designing a parallel mode oscillator like those used on most
microcontrollers (80C31, 68HC11, etc.), it is necessary to specifiy
a parallel crystal with a given load capacitance.  I am trying to 
come up with a formula for determining the load capacitance.

                     |\
                     | \
                -----|  >O------
                |    | /       |
                |    |/        |
                |              |
                |              |
                |  | -----  |  |
                |  | |    | |  |
                +--| |    | |--+
                |  | |    | |  |
                |  | ------ |  |
                |     XTAL     |
                |              |
                |              |
         C1  -------        ------- C2
             -------        -------
                |              |
                |              |
                |              |
             -------        -------
              -----          ----- 
               ---            ---



For the circuit above, the load capacitance should be

	Cload = C1 + C2 + 2 * pin capacitance

Now most design examples use C1 and C2 in the range of 20 to
33 pF, and pin capacitance is approx. 10 pF for most ICs, so
Cload should be in the range of 60 to 100 pF. However, the
standard Cload values for stock crystals (and the design
examples I've seen) usually have Cload in the range of 20 to
40 pF.

Has anyone explored this issue or seen a good explanantion of 
this discrepancy?  I will be using crystals in large enough 
volumes that I can specify Cload to the manufacturer; however,
I feel that I might be missing something in my analysis. Any
help would be greatly appreciated.

Barry Moss

P.S. I already know that parallel and series resistors have the
     same internal composition, but that they resonate at slightly
     different frequencies when connnected series or parallel.


-- 
-------------------------------------------------------
  Barry Moss				 (604) 277-1511
  Mobile Data International, 11411 Number Five Road
  Richmond, BC, Canada  V7A 4Z3

mcovingt@athena.cs.uga.edu (Michael A. Covington) (12/22/90)

If the load capacitance is wrong, the frequency will be a *tiny* bit off,
but the crystal will still oscillate (assuming the capacitance is not
totally unreasonable). Actually, crystal load capacitance is something of
a red herring because few people measure it very accurately -- not even
the crystal makers.

Are you building a 24.9999999-MHz 386?   :)

(I do mean a *tiny* bit off. Parts per million.)

stevem@specialix.co.uk (Steven Murray) (12/27/90)

Barry Moss writes, concerning load capaitors on crystal oscillators:

>When designing a parallel mode oscillator like those used on most
>microcontrollers (80C31, 68HC11, etc.), it is necessary to specifiy
>a parallel crystal with a given load capacitance.  I am trying to 
>come up with a formula for determining the load capacitance.


Mr Moss -

I can't really answer your question - I do not know why
22pf - 33pf capacitors are the ones that most often get
used in this situation - but I do know that they are often
the most suitable.

A year or so ago I had to design a built-in modem for an 80C31
based product, and this required that we have the 80C31 oscillator
be spot on in terms of frequency - the 80C31 oscillator is not
really rated in terms of accuracy, and for best results with a
switched capacitor modem, you want to be on frequency.  (There
were good economic reasons for using the 80C31's oscillator).

Being a bit pragmatic I gave up on the books, got a load of 
different manufacturers 80C31's, crystals, a good frequency 
counter, some freeze spray and a heat gun, and lots of caps.

In this particular situation 22pf on one side and 39pf on the
other gave the best, stable, trimmed frequency.  I had decided
that I would be happy if I could consistently get 50ppm 
frequency accuracy in production, with maybe a few units out 
to 100ppm.  I was getting 25ppm on the lab bench, so left it
at that.

Regards,
Steven Murray

-- 
Steven Murray
uunet!slxsys!stevem  stevem@specialix.co.uk
I am speaking, but  | If these are your opinions, then we are in agreement!!
not for my employer.| Flames, spelling errors, complaints > /dev/null

johne@hp-vcd.HP.COM (John Eaton) (01/03/91)

<<<<
< For the circuit above, the load capacitance should be
<
<	Cload = C1 + C2 + 2 * pin capacitance
< 
< Now most design examples use C1 and C2 in the range of 20 to
< 33 pF, and pin capacitance is approx. 10 pF for most ICs, so
< Cload should be in the range of 60 to 100 pF. However, the
< standard Cload values for stock crystals (and the design
< examples I've seen) usually have Cload in the range of 20 to
< 40 pF.
----------
Cload is the capacitance as seen by the crystal.


   Cload = (C1+pinCap)*(C2+pinCap)/((C1+pinCap)+(C2+pinCap))


If you ignore the ground for a moment you will see that the
two caps are in a series (not parallel) configuration as 
seen by the crystal.


John Eaton
!hpvcfs1!johne

verive@tellabs.com (Jeff Verive) (01/03/91)

In response to the question about crystal load capacitance - 

                           | ---- | crystal
                +----------| |  | |----------+
                |          | ---- |          |
                |                            |
                |           |\   inverter    |
                |           |  \             |
                +-----------|   >()----------+----------[]   output
                |           |  /             |
                |           |/               |
              -----                        -----
              -----  CL1                   ----- CL2
                |                            |
                |                            |
                +-------------+--------------+
                              |
                            -----
                             ---
                              -

Given the above "typical" crystal oscillator, the values of CL1 and CL2
can be determined with a reasonable amount of precision.  Before going 
into the procedure, let's lay down just a little ground work.

In any oscillator, two criteria must be met (the Barkhausen Criteria) :

     1) loop gain must be at least equal to 1.00; and 

     2) phase shift around the loop must be an integer 
        multiple of 360 degrees.

These criteria must both be met at the frequency of interest.  Now, 
looking back at the circuit, we have an inverting amplifier and 
a feedback network.  The feedback network is therefore a crystal 
in parallel with a series-capacitor pair (neglect the ground point
for this analysis; it can be shown that there is a circulating current
in the feedback network that does not "see" the ground.)  Since our
oscillator must have 360 degrees (or an integer multiple thereof), and
the inverter provides 180 degrees, the feedback network must provide the
other 180 degrees.

For the feedback network to introduce a 180 degree phase shift, it must
have the form of an L-C tank (given the above configuration), and
we immediately see that the crystal takes the place of the "L" in the
tank.

With all that said, it is a fairly simple job to determine the values of
the load capacitors CL1 and CL2.  That is to say, the mathematics are
quite straightforward, but there are practical problems with this 
circuit.  Don't get me wrong, though; it's a good circuit - we just
have to handle a few of "gotcha's".

First of all, the inverter has a small value of capacitance associated
with its input.  For common logic families, this is typically in the
range of 4-8 pF, so we must add this to CL1 (since it is actually in
parallel with CL1).  We will use a value of 6 pF for this purpose.

Our output is used to drive some other circuitry, so we must
also accommodate the capacitance associated with the inputs of the
driven circuit.  Usually we will choose to use another inverter to
"buffer" the oscillator circuit; this way, the actual oscillator stage
only has to drive a small, known load.  The added capacitance is also
about 6 pF, and we see that we must add it to CL2.

There is also some stray capacitance associated with the wiring and/or
printed circuit board traces, and this is usually only a few pF.  
Although this stray capacitance is distributed over the entire circuit,
we usually treat it as if it were lumped into a 2-4 pF capacitance
connected directly across the crystal.  

Finally, there is a capacitance associated with the output of the
inverter, and this capacitance is a major source of frustration for the
uninitiated.  There are two "parts" to this capacitance; one is a
physical capacitance due to the separation of conductors in the
inverter's output stage and in the packaging, and the other is an
effective capacitance which is due to the finite time required to
propagate the signal through the inverter.  The first capacitance is
typically about 5 pF, and the latter, though highly frequency dependent,
is generally taken to be in the range of 5-30 pF, with 15 pF a good
compromise.  These capacitances must be added to CL2.

Now we can get down to determining the values of CL1 and CL2.  One last
caveat though - it has been empirically determined that excessively
large or small values of capacitance can cause problems.  I am not 
going to get into these problems here because they are too dependent on
the technology (TTL, CMOS, NMOS, etc.), inverter configuration (compensated,
de-compensated, Schmitt Trigger, etc.), and frequency.  For most cases,
however, we will be safe if we select values of CL1 and CL2 in the range
of 10-40 pF.

The most common scenario involves designing an oscillator given the
crystal manufacturer's specified load capacitance, which we now know
(from the discussion above) to be approximately given as


                                   1
  CL = 3 pF +  -------------------------------------------------
                      1                        1
                 ------------  +   ---------------------------
                  CL1 + 6 pF        CL2 + 6 pF + 5 pF + 15 pF


We will commonly choose to make CL1 = CL2 (or CL1 a trimmer capacitor
whose mid-range value is equal to CL2), so that given CL, it is fairly
easy to calculate values for CL1 and CL2.

For example, let's calculate CL1 and CL2 for a crystal whose load
capacitance is specified as 18 pF :


                     1
  18 = 3 + ----------------------
               1           1
            -------  +  -------- 
             C + 6       C + 26

Solving this gives C = 17 pF.  This is not a standard value, so 18 pF could
be used for non-critical applications.  If extreme accuracy is necessary, 
CL2 could be 15 pF and CL1 variable from about 10 to 50 pF, although actual
values are much more likely to be determined after the basic circuit has 
been laid out on a printed circuit board (so that stray capacitances and
other variables are made less variable.)  In any event, the final values
should match the calculated values within 10% to 20%.  As is usually the
case with high frequency analog circuitry, analysis is far more precise 
than is synthesis.

I hope this has helped to de-mystify crystal oscillator operation.  To be
sure, this is a mere overview, but it addresses the major hurdles usually
encountered in crystal oscillator design.

One final note - the circuit and description above are for AT-cut crystals
operating in parallel resonance and at their fundamental frequencies.  
While this may seem like a serious restriction on the utility of the above
discussion, virtually all microprocessor crystals fall into this category.
--
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**   Jeff  Verive  |  If they ever stop making those little candy flowers **
**   259371048378  |  for birthday cakes, I shall lose my will to live.   **
****************************************************************************