stx0641@uoft02.utoledo.edu (12/19/90)
Hi, I have a question concerning 80386 motherboard. My friend told me that we can use 16Mhz 80386 DX CPU on 25Mhz 80386 DX motherboard. Is it reliable? Will it destroyed chips on the motherboard? Thanks for any answer. Fadhil.
henry@zoo.toronto.edu (Henry Spencer) (12/29/90)
In article <1990Dec18.234020.2491@uoft02.utoledo.edu> stx0641@uoft02.utoledo.edu writes: > My friend told me that we can use 16Mhz 80386 DX CPU on 25Mhz 80386 DX >motherboard. > Is it reliable? Will it destroyed chips on the motherboard? It is unlikely to do any damage. But it will not be reliable. Chips will often run faster than their rated speed, when the temperature and the power voltage and the surrounding circuitry and the phase of the moon are all just right. But there is no way to tell whether the chip is just barely working, so that the slightest change in conditions will start producing intermittent random failures. -- "The average pointer, statistically, |Henry Spencer at U of Toronto Zoology points somewhere in X." -Hugh Redelmeier| henry@zoo.toronto.edu utzoo!henry
otto@tukki.jyu.fi (Otto J. Makela) (12/31/90)
In article <1990Dec28.210731.10685@zoo.toronto.edu> henry@zoo.toronto.edu (Henry Spencer) writes: In article <1990Dec18.234020.2491@uoft02.utoledo.edu> stx0641@uoft02.utoledo.edu writes: > My friend told me that we can use 16Mhz 80386 DX CPU on 25Mhz 80386 DX >motherboard. Is it reliable? Will it destroyed chips on the motherboard? It is unlikely to do any damage. But it will not be reliable. Chips will often run faster than their rated speed, when the temperature and the power voltage and the surrounding circuitry and the phase of the moon are all just right. But there is no way to tell whether the chip is just barely working, so that the slightest change in conditions will start producing intermittent random failures. Actually, if it boots, it'll probably be (reasonably) reliable. The 80386 is such a complicated beastie that if it's even slightly flaky, it'll probably crash immediately. It'll probably run hotter 'en 'ell, though. Now, the problem with Taiwanese 25MHz boards that are built with 20MHz chips is that since the support chips (you know, like the ones that C&T makes) are also rated for the lower speed, all the timings are screwed up. It won't mean much if you only use a ST-506 hard disk, but you probably won't get an Adaptec SCSI to run, since they try to use the bus to a maximum efficiency ! Also, I've seen several IDE hard disks which intermittently scrambled the data they were reading/writing, when run on a cheapo 25MHz machine. No, they didn't give a CRC error or anything, they screwed up on the data bus side. This is again easy to ignore on a low-tech operating system like DOS, where you'll notice the problem only when your FAT gets hit, but Unix won't even get halfway up on machines like this. Caveat Emptor! "I've seen things... you people couldn't imagine. Attack ships on fire off the shoulders of Orion. I've watched C-beams glitter in the dark near the Tannhauser gates. All those moments will be lost... like tears in the rain." -- /* * * Otto J. Makela <otto@jyu.fi> * * * * * * * * * * * * * * * * * * */ /* Phone: +358 41 613 847, BBS: +358 41 211 562 (CCITT, Bell 24/12/300) */ /* Mail: Kauppakatu 1 B 18, SF-40100 Jyvaskyla, Finland, EUROPE */ /* * * Computers Rule 01001111 01001011 * * * * * * * * * * * * * * * * */
koziarzw@lonex.radc.af.mil (Walter Koziarz) (01/02/91)
In article <OTTO.90Dec31040234@tukki.jyu.fi> otto@tukki.jyu.fi (Otto J. Makela) writes: >In article <1990Dec28.210731.10685@zoo.toronto.edu> henry@zoo.toronto.edu (Henry Spencer) writes: > In article <1990Dec18.234020.2491@uoft02.utoledo.edu> stx0641@uoft02.utoledo.edu writes: > > My friend told me that we can use 16Mhz 80386 DX CPU on 25Mhz 80386 DX > >motherboard. Is it reliable? Will it destroyed chips on the motherboard? > > It is unlikely to do any damage. But it will not be reliable. Chips will > often run faster than their rated speed, when the temperature and the power > voltage and the surrounding circuitry and the phase of the moon are all > just right. But there is no way to tell whether the chip is just barely > working, so that the slightest change in conditions will start producing > intermittent random failures. > >Actually, if it boots, it'll probably be (reasonably) reliable. The 80386 >is such a complicated beastie that if it's even slightly flaky, it'll probably >crash immediately. It'll probably run hotter 'en 'ell, though. > Perhaps yes, perhaps no. Admittedly, the '386 is far more complex than an 8088; but the following may be applicable anyway. Experience (my own) has shown that 5MHz-rated 8088's will run reliably at 8MHz for periods of time not exceeding 20 minutes before system crashes occur. The time interval starts at 20minutes and decreases relatively uniformly until the time interval is so short that the power-on-self-test won't even start. This pattern can be repeated with subsequent parts, indicating it is likely to be always true. Therefore, based upon the 8088 results, I have to agree with the poster advising against the use of a too-slow '386 as it will self-destruct after some finite number of minutes of operation. Walt K.
mcginnis@kuhub.cc.ukans.edu (01/03/91)
>My friend told me that we can use 16Mhz 80386 DX CPU on 25Mhz 80386 DX >motherboard. >Is it reliable? Will it destroyed chips on the motherboard? Go ahead and try. It is unlikely to cause any hardware damage. The way Intel determines chip speeds is at the "back end" of production, after the chip has been packaged. The packaged chips are tested under a variety of conditions and speeds. If the chips fail at a high speed they are tested at consecutively lower speeds. There is no manufacturing difference between fast and slow chips. Intel does rather tough testing so it is quite possible that a chip that could not pass _their_ testing at 25 MHz would perform adequately when installed in a PC. But it might not. Consider that the damage done by a malfuctioning microprocessor depends partially upon what the processor is doing when it screws up... was it updating an important file? Does it address the wrong I/O address? Does it hang? Lots of things can be run OK beyond their specifications. EPROMs and RAM chips often work OK at higher speeds. You can often format a 20 MB hard disk as a 40 MB and still have relatively few bad sectors. It's your machine and your data. If you want to play Russian Roulette then good luck.
esmith@goofy.apple.com (Eric Smith) (01/09/91)
In article <OTTO.90Dec31040234@tukki.jyu.fi> otto@tukki.jyu.fi (Otto J. Makela) writes about using a 16 MHz 80386DX in a 25 MHz circuit: > Actually, if it boots, it'll probably be (reasonably) reliable. The 80386 > is such a complicated beastie that if it's even slightly flaky, it'll > probably crash immediately. Maybe, maybe not. > It'll probably run hotter 'en 'ell, though. Not unless the 25 MHz chips run hotter 'en 'ell. The 16 and 25 MHz rated parts have the same circuitry implemented in the same (mostly) CMOS process, so the power dissipation of the two will be nearly identical at the same clock speed. The 16 MHz part is simply not guaranteed to run at 25 MHz. It may never have been tested for 25 MHz operation, or it may have failed 25 MHz test but passed 16 MHz test. Keep in mind the the manufacturers speed rating applies over the entire specified operating temperature range. If you cool the chip, it will be capable of running faster (although since Intel doesn't put that in the specifications, they won't guarantee it). In general, I personally consider it to be very poor engineering practice to push parts past the manufacturers specs just to save a few $$$. I trust a lot of data to my computer, and that's worth more to me than a one time savings of less than $100. I wouldn't knowingly buy any product in which such things are done. -- Eric L. Smith Opinions expressed herein do not necessarily reflect those esmith@apple.com of my employer, friends, family, computer, or even me! :-)
dana@locus.com (Dana H. Myers) (01/10/91)
In article <ESMITH.91Jan8115534@goofy.apple.com> esmith@goofy.apple.com (Eric Smith) writes: >In article <OTTO.90Dec31040234@tukki.jyu.fi> otto@tukki.jyu.fi (Otto J. Makela) writes about using a 16 MHz 80386DX in a 25 MHz circuit: > >> Actually, if it boots, it'll probably be (reasonably) reliable. The 80386 >> is such a complicated beastie that if it's even slightly flaky, it'll >> probably crash immediately. > >Maybe, maybe not. Be more specific. One thing I recall with the 286s was that lower speed parts would run DOS ok at higher clock rates, but then they'd hang or crash when you try to run Unix (or any other protected mode program). It seems the MMU couldn't keep up at the higher speed. >> It'll probably run hotter 'en 'ell, though. > >Not unless the 25 MHz chips run hotter 'en 'ell. >The 16 and 25 MHz rated parts have the same circuitry implemented in the >same (mostly) CMOS process, so the power dissipation of the two will be >nearly identical at the same clock speed. The 25Mhz chips DO run hotter than the the 16Mhz parts. CMOS power consumption occurs during transitions. There are two reasons why;(1) current must flow through the gate capacitances (standard 1/(2*pi*f*C) stuff) and (2) there is a brief instant when both the P and N channel FETs are conducting. Resultantly, the power consumption of CMOS parts is roughly proportional to frequency of operation. A 25Mhz will consume about 25/16 (or 150%) of the power a 16Mhz part consumes. >The 16 MHz part is simply not guaranteed to run at 25 MHz. It may never >have been tested for 25 MHz operation, or it may have failed 25 MHz test >but passed 16 MHz test. Or it may have failed some aspect of the 25Mhz test that the user won't encounter :-). >In general, I personally consider it to be very poor engineering practice >to push parts past the manufacturers specs just to save a few $$$. I >trust a lot of data to my computer, and that's worth more to me than a >one time savings of less than $100. I wouldn't knowingly buy any product >in which such things are done. Good advice, even if I wouldn't hire you to design CMOS computers for me :-) :-). Dana -- /* * Dana H. Myers KK6JQ | Views expressed here are * * (213) 337-5136 | mine and do not necessarily * * dana@locus.com | reflect those of my employer *
esmith@goofy.apple.com (Eric Smith) (01/11/91)
In article <1991Jan10.061457.2817538@locus.com> dana@locus.com (Dana H. Myers) writes: >In article I (esmith@apple.com) write: someone else>>> It'll probably run hotter 'en 'ell, though. ELS>> Not unless the 25 MHz chips run hotter 'en 'ell. ELS>> The 16 and 25 MHz rated parts have the same circuitry implemented in the ELS>> same (mostly) CMOS process, so the power dissipation of the two will be ELS>> nearly identical at the same clock speed. DHM> The 25Mhz chips DO run hotter than the the 16Mhz parts. CMOS power DHM> consumption occurs during transitions. There are two reasons why;(1) DHM> current must flow through the gate capacitances (standard 1/(2*pi*f*C) DHM> stuff) and (2) there is a brief instant when both the P and N channel DHM> FETs are conducting. Resultantly, the power consumption of CMOS parts DHM> is roughly proportional to frequency of operation. A 25Mhz will consume DHM> about 25/16 (or 150%) of the power a 16Mhz part consumes. If you read what I said carefully, so will see that I didn't say that running a 16 MHz rated part at 25 MHz wouldn't increase the generated heat (i.e., power dissipation). What I said is that there since 16 MHz and 25 MHz parts are implemented in the same process, a 16 MHz rated part running at 25 MHz should have approximately the same power dissipation as a 25 MHz rated part running at 25 MHz. Similarly, a 25 MHz rated part running at 16 MHz should have approximately the same power dissipation as a 16 MHz part running at 16 MHz. So, as I said, a 16 MHz rated part running at 25 MHz is not going to run "hotter 'en 'ell" unless a 25 MHz rated part running at 25 MHz runs "hotter 'en 'ell". Of course, "hotter 'en 'ell" is somewhat subjective. Of course, depending on the design of a part, it is possible that pushing the part too far beyond its speed rating may actually damage the part by allowing the P and N channel FETs to conduct simultaneously for extend periods of time. I would not expect this to happen unless you try to push the part not just beyond its own speed rating, but somewhat beyond the maximum speed rating offered by the vendor. In summary, I think we both are in agreement about the characteristics of CMOS parts. I repeat that I do not reccomend running parts in excess of their ratings (speed or otherwise) in any type of production system. DHM> Good advice, even if I wouldn't hire you to design CMOS computers DHM> for me :-) :-). Maybe you'll reconsider? :-) :-) -- Eric L. Smith Opinions expressed herein do not necessarily reflect those esmith@apple.com of my employer, friends, family, computer, or even me! :-)
plim@hpsgwp.sgp.hp.com (Peter Lim) (01/14/91)
/ dana@locus.com (Dana H. Myers) / 2:14 pm Jan 10, 1991 /
$ The 25Mhz chips DO run hotter than the the 16Mhz parts. CMOS power
$ consumption occurs during transitions. There are two reasons why;(1)
$ current must flow through the gate capacitances (standard 1/(2*pi*f*C)
$ stuff) and (2) there is a brief instant when both the P and N channel
$ FETs are conducting. Resultantly, the power consumption of CMOS parts
$ is roughly proportional to frequency of operation. A 25Mhz will consume
$ about 25/16 (or 150%) of the power a 16Mhz part consumes.
$
If I remember correctly, the energy dissipated in a CMOS chip is
proportional to the square of the frequency. So, 25 MHz vs. 16 MHz power
supply would be 25^2 / 16^2 = 244 %. Quite a hell lot more power.
Assuming voltage and impedance stay about constant, heating rate of
the chip will be about proportional to power dissipation. But since
higher temperature will give rise to higher rate of heat loss; may be
a part running at 25 MHz will be about twice as hot as a part running
at 16 MHz.
(Somehow, can't quite remember the equation that says that power is
proportional to freq^2).
Regards, . .. ... .- -> -->## Life is fast enough as it is ........
Peter Lim. ## .... DON'T PUSH IT !! >>>-------,
########################################### :
E-mail: plim@hpsgwg.HP.COM Snail-mail: Hewlett Packard Singapore, :
Tel: (065)-279-2289 (ICDS, ICS) |
Telnet: 520-2289 1150 Depot Road, __\@/__
Singapore 0410. SPLAT !
#include <standard_disclaimer.hpp>dana@locus.com (Dana H. Myers) (01/15/91)
In article <4400001@hpsgwp.sgp.hp.com> plim@hpsgwp.sgp.hp.com (Peter Lim) writes: >/ dana@locus.com (Dana H. Myers) / 2:14 pm Jan 10, 1991 / > >$ The 25Mhz chips DO run hotter than the the 16Mhz parts. CMOS power >$ consumption occurs during transitions. There are two reasons why;(1) >$ current must flow through the gate capacitances (standard 1/(2*pi*f*C) >$ stuff) >$ Resultantly, the power consumption of CMOS parts >$ is roughly proportional to frequency of operation. A 25Mhz will consume >$ about 25/16 (or 150%) of the power a 16Mhz part consumes. I should phrase this better. A 25Mhz part will consume about 25/16 (or about 150%) of the power the same part at 16Mhz. >If I remember correctly, the energy dissipated in a CMOS chip is >proportional to the square of the frequency. So, 25 MHz vs. 16 MHz power >supply would be 25^2 / 16^2 = 244 %. Quite a hell lot more power. >Assuming voltage and impedance stay about constant, heating rate of >the chip will be about proportional to power dissipation. But since >higher temperature will give rise to higher rate of heat loss; may be >a part running at 25 MHz will be about twice as hot as a part running >at 16 MHz. > >(Somehow, can't quite remember the equation that says that power is >proportional to freq^2). Well, let's derive something close. Power is given by: P=IV Where: P = power in Watts I = current in Amperes V = voltage in Volts Since we are assuming the power is disspated in capacitance, we'll use the simple form of capacitive reactance: Xc = 1 / (2*Pi*f*C) Where: Xc = capacitive reactance, in Ohms Pi = pi, 3.14159... f = frequency, in Hz C = capacitance, in Farads Using Ohms Law for the current: Idynamic = 2*Pi*f*C*V Resulting in a dynamic power dissipation of: Pdynamic = V^2 * 2 * Pi * f * C You'll see that the dynamic component of the power dissipation is directly proportional to the frequency of operation, and proportional to the square of the applied voltage. In reality, the power consume is the sum of the static and dynamic components: Ptotal = Pstatic + Pdynamic which can also be expressed: Ptotal = V * (Istatic + Idynamic) or: Ptotal = V * (Istatic + 2 * Pi * f * C * V). This is a very simplified picture. I might have left lots of stuff out. However, graphs of current vs. frequency for popular CMOS parts (386 included) have a linear slope. Dana -- /* * Dana H. Myers KK6JQ | Views expressed here are * * (213) 337-5136 | mine and do not necessarily * * dana@locus.com | reflect those of my employer *
scott@hpcvca.CV.HP.COM (Scott Linn) (01/16/91)
/ hpcvca:sci.electronics / dana@locus.com (Dana H. Myers) / 12:51 pm Jan 14, 1991 / >Power is given by: > > P=IV > > Where: > P = power in Watts > I = current in Amperes > V = voltage in Volts Right, and I = C * dv/dt, so P = C * V * dv/dt. In CMOS dv is equal to the supply (transitions are from supply to ground), so P = C * V^2 / dt. But, 1/dt is the same as switching frequency, so Pdynamic = C * V^2 * f, not > Pdynamic = V^2 * 2 * Pi * f * C, which gives you a value over 6 times larger than the actual power dissipation. Scott Linn
plim@hpsgwp.sgp.hp.com (Peter Lim) (01/16/91)
/ dana@locus.com (Dana H. Myers) / 4:51 am Jan 15, 1991 / write:
$ Well, let's derive something close.
$
$ Power is given by:
$
$ P=IV
$
[stuff deleted]
$
$
$ Pdynamic = V^2 * 2 * Pi * f * C
$
$ You'll see that the dynamic component of the power dissipation is
$ directly proportional to the frequency of operation, and proportional
$ to the square of the applied voltage.
$
Oops ! I goofed. I've just checked closely. You are correct. P is
proportional to V^2 and NOT f^2. My apology !
Regards, . .. ... .- -> -->## Life is fast enough as it is ........
Peter Lim. ## .... DON'T PUSH IT !! >>>-------,
########################################### :
E-mail: plim@hpsgwg.HP.COM Snail-mail: Hewlett Packard Singapore, :
Tel: (065)-279-2289 (ICDS, ICS) |
Telnet: 520-2289 1150 Depot Road, __\@/__
Singapore 0410. SPLAT !
#include <standard_disclaimer.hpp>mcovingt@athena.cs.uga.edu (Michael A. Covington) (01/17/91)
In article <1991Jan14.205104.2829526@locus.com> dana@locus.com (Dana H. Myers) writes: > >Since we are assuming the power is disspated in capacitance, we'll >use the simple form of capacitive reactance: >...etc... Er... Power is not dissipated in capacitance. No such thing. Only resistance can dissipate power. Here's how CMOS dissipation works. A CMOS chip dissipates power resistively while transitioning from one state to the other, and while charging the input capacitance of another chip. (That's how capacitance got into it... the capacitance does not dissipate power, but it provides current flow through a resistance.) The time taken to make a transition, and the time taken to charge an input capacitance, are constant for any given set of chips. So is the amount of power dissipated per transition. Clock frequency is then (proportional to) number of transitions per second. I would maintain that *both* current *and* power are proportional to frequency (not the square of frequency). Odd, but plausible once you realize we are talking about varying the duty cycle, not the voltage or current. 73 de N4TMI
dana@locus.com (Dana H. Myers) (01/17/91)
In article <3340012@hpcvca.CV.HP.COM> scott@hpcvca.CV.HP.COM (Scott Linn) writes: >/ hpcvca:sci.electronics / dana@locus.com (Dana H. Myers) / 12:51 pm Jan 14, 1991 / > >>Power is given by: >> >> P=IV >> >> Where: >> P = power in Watts >> I = current in Amperes >> V = voltage in Volts > >Right, and I = C * dv/dt, so P = C * V * dv/dt. > >In CMOS dv is equal to the supply (transitions are from supply to >ground), so P = C * V^2 / dt. But, 1/dt is the same as switching frequency, >so Pdynamic = C * V^2 * f, not > >> Pdynamic = V^2 * 2 * Pi * f * C, > >which gives you a value over 6 times larger than the actual power >dissipation. Right. As I was writing the original posting, I was asking myself, is this really correct? I looked it up, and, sure enough, the 2*Pi component is incorrect. Of course, this does not affect the discussion of the relationship of frequency and power consumption. -- * Dana H. Myers KK6JQ | Views expressed here are * * (213) 337-5136 | mine and do not necessarily * * dana@locus.com | reflect those of my employer *
Mike.McManus@FtCollins.NCR.com (Mike McManus) (01/23/91)
In article <1991Jan16.161646.9446@athena.cs.uga.edu> mcovingt@athena.cs.uga.edu (Michael A. Covington) writes: > In article <1991Jan14.205104.2829526@locus.com> dana@locus.com (Dana H. Myers) writes: > > > >Since we are assuming the power is disspated in capacitance, we'll > >use the simple form of capacitive reactance: > >...etc... > > Er... Power is not dissipated in capacitance. No such thing. > Only resistance can dissipate power. > > Here's how CMOS dissipation works. > > A CMOS chip dissipates power resistively while transitioning from one > state to the other, and while charging the input capacitance of another > chip. (That's how capacitance got into it... the capacitance does not > dissipate power, but it provides current flow through a resistance.) Well, after reading several of these postings, I've noticed 2 things: the thread following the mathematical derivation came to the correct conclusion, that P=C*V^2*f. Second, the the simpler explanations, while not strictly wrong, are kind of missing the mark. Mike's comment is half right: *STATIC* power is not dissipated thru capacitance, only through resistance. But *DYNAMIC* power is. CMOS circuits will dissipate some static power, but every little. What is the mechanism for this? Look at a CMOS inverter (for those of you unfamiliar with CMOS, I'm going to cheat and describe this in terms of switches instead of MOS transistors): Vdd | IN=0 -> / | Cload(OUTPUT) +----||----+-----> | | IN=1 -> / | | | Vss Vss When the input is 1, the lower switch closes, pulling the output low and discharging Cload. When the input is 0, the upper switch closes and pulls the output high, charging Cload. Static power can only be dissipated when both switches are closed, and that power will be Pstatic=IV=V^2/R, where V=(Vdd-Vss), and I=V/R, where V is as above and R is the combined resistance of both switches (which are really transistors). But in the ideal case, this never happens, so that static power dissipated in a CMOS circuit (I mean *FULL* CMOS; there are circuits that are built in CMOS that don't strictly follow the "Complimentary" rule of CMOS, but I'm ignoring these...) is zero. In the real case, the static power depends on the shape of the input signal. If it's a perfect square wave, then Pstatic = 0. Since it will always be somewhat non-square, there will be a short period of time when the input will be between Vss and Vdd, and during that short period both switches are on (or at least "partially on", since they are really transistors :-) and Pstatic > 0. In fact, one could say that Pstatic=(V^2*g)/R (roughly), where g is the percentage of time during which the input signal is transitioning between Vss and Vdd, a decidely small number in most cases. So normally in CMOS, Pstatic << Pdymanic, which is why P=C*V^2*f doesn't have a resistive portion (as Mike notes). As Mike says, the C is the input load of a following circuit (Cload here). When the input to this inverter is toggled, Cload is repeatedly charged and discharged (think of it as a "current pump", (which it is in a sense :-)). So current is being driven from Vdd to Vss, but not statically, only dynamically (meaning only as the input to the inverter changes). Without going into the mathematics of it (as was already done quite clearly), it is obvious that the amount of charge that can be moved is proportional to frequency (f) of the input changing, as well as to the the size of the the capacitive load (the "charge bucket"). Hope this explanation helps to explain why CMOS is typically a low-power logic technology, and why the power dissipation (they really mean "dynamic" or "AC" dissipation when they say this) goes up when the frequency does. -- Disclaimer: All spelling and/or grammar in this document are guaranteed to be correct; any exseptions is the is wurk uv intter-net deemuns,. Mike McManus Mike.McManus@FtCollins.NCR.COM, or NCR Microelectronics ncr-mpd!mikemc@ncr-sd.sandiego.ncr.com, or 2001 Danfield Ct. uunet!ncrlnk!ncr-mpd!garage!mikemc Ft. Collins, Colorado (303) 223-5100 Ext. 378