burnette@ecadjr.enet.dec.com (My name is...) (02/28/91)
I was wondering if someone could offer any suggestions to a circuit
that I want to design. I have a few ideas, but I was looking
for further insight.
Ultimately I wish to use a missing pulse detector to trigger a
timer-relay circuit using specific criteria, but I've run into
a few snags.
Givens:
G1. Missing pulse detector's output will go low until a new
input pulse arrives.
G2. Timer-relay circuit is triggered via a low pulse.
Generic Design Criteria:
DC1. Use one timer-relay circuit by electronically switching
between two RC time-constant networks to acheive the desired
timing sequences. Solid state switch should emulate SPDT
type, with one contact always connected.
DC2. Provide a pulse-train of 3 negative going pulses or 1
negative going pulse, depending on edge detection criteria.
Specific Design Criteria:
Missing Pulse Detector: (Output Pin)
I. Low output pulse detected - (Negative or Falling Edge):
s1. Electronically switch to activate secondary RC time
constant network.
s2. Provide timer-relay circuit with a pulse-train of
3 negative going pulses for triggering.
s3. Return electronic switch to primary RC time constant
network after timing sequence is completed.
II. High (Stable) output resumed - (Positive or Rising Edge):
s1. Pulse timer-relay with one negative going pulse.
Any help is greatly appreciated. Thanks in advacne.
/Brian
Email responses: burnette@ecadjr.enet.dec.com