IO80900@MAINE.BITNET (03/17/91)
For a project that I am working on, I need to know the capacitances of "typical" DRAM cells in use today (1-T). I need values for 64K,256K,1M, and 4M cells; but any and all numbers, references, and leads would be appreciated. And yes, I have checked through the IEEE proceedings and other tech. magazines in my library, but the majority of them have been taken away to be bound or something, so I would appreciate any help from the rest of the world on this. Reply by e-mail or post, whichever is most convenient for you (hopefully my NETNEWS linkage won't be disrupted as it has for the last week or so!). C.A. Gagnon IO80900@MAINE.BITNET io80900@maine.maine.edu
mark@mips.com (Mark G. Johnson) (03/18/91)
In article <91075.114646IO80900@MAINE.BITNET> IO80900@MAINE.BITNET writes: >For a project that I am working on, I need to know the capacitances of >"typical" DRAM cells in use today (1-T). The best place to look is in the back issued of the IEEE Journal of Solid State Circuits; the October issues are about memory devices. Here's an excerpt: "Cell size is 4.0 x 9.0 microns, and the layout is shown in Figure 2. In this layout, the storage capacitor comprises 29 percent of the cell area, giving a cell capacitance of 32fF when a "1" is stored, and 35 fF when a "0" is stored. Differential signal at the sense amplifier is approximately 80-90 mV with Vcc=4.5V ..." ---- R. Taylor and M. Johnson, "A 1-Mbit CMOS Dynamic RAM with a Divided Bitline Matrix Architecture," IEEE Journal of Solid State Circuits, Vol SC-20, No.5, October 1985, pp. 894-902. For those who wondered: Yes, the cell capacitance is indeed nonlinear and varies with stored voltage. There is after all a PN junction involved. -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques M/S 2-02, Sunnyvale, CA 94086 (408) 524-8308 mark@mips.com {or ...!decwrl!mips!mark}