scafidi@aramis.rutgers.edu (John Scafidi) (03/22/91)
What is the speed at which the AT bus can output data to an IO port ? In the Feb. 18 issue of EDN, J.D.Mosley states that the 16 bit AT bus (ISA) limits the data transfer to a maximum of 8M bytes/sec. Since the AT bus is 16 bits or 2 bytes wide, doesn't this mean that you can perform IO at the rate of 1/2 Mhz ? Previously I have heard that the AT bus is either a 2 Mhz or a 6 Mhz bus. Can someone out there in Net Land clarify this ? Also, reference books, I'm using a book called "Handbook of Software & Hardware Interfacing for IBM PCs" by Jeffery Royer. It's a good book, but anyone recommend other good PC interfacing books ? Can anyone report on how good is the "AT Bus Design Book" by Annabooks in San Diego? Thanks in advance. John Scafidi Rutgers University
rainer@boulder.Colorado.EDU (Rainer Malzbender) (03/23/91)
In article <Mar.22.10.24.57.1991.6739@aramis.rutgers.edu> scafidi@aramis.rutgers.edu (John Scafidi) writes: > >What is the speed at which the AT bus can output data to an IO port ? > >In the Feb. 18 issue of EDN, J.D.Mosley states that the 16 bit AT bus >(ISA) limits the data transfer to a maximum of 8M bytes/sec. > From what someone else told me, the ISA spec says the bus clock should be 8.33 Mhz (not bytes!), but there are plenty of clones around which let you run the bus faster than that (mine goes to 20 Mhz). The bus clock and the CPU clock are generally at least somewhat decoupled. On an AT the fastest way I know of to transfer data to the outside world is using the "rep outsw" instruction, which requires four bus clocks per transfer plus an overhead of 5 clocks at the beginning of the instruction. With an 8 Mhz bus clock, that comes out to 2 M transfers/sec, or 4 MBytes/sec, or 64 Mbits/sec. This is faster than DMA due to the way the DMA controller is essentially crippled on a PC. However, DMA *does* let you (i.e., the CPU) do other things at the same time (by interleaving bus cycles, which is why it's slower), which the software method does not. Of course, you won't be able to keep this up for long, since interrupts need to get in there once in a while, plus DRAM refresh cycles. There was a discussion in c.s.i.p.h about this just recently. -- Rainer Malzbender, PhD "It's not the bullet that kills you, it's the hole." Dept. of Physics (303)492-6829 -Laurie Anderson U. of Colorado, Boulder rainer@boulder.colorado.edu 128.138.240.246
ressler@galileo.ifa.hawaii.edu (Mike "IR" Ressler) (03/23/91)
In article <1991Mar22.193427.6586@colorado.edu> rainer@boulder.Colorado.EDU (Rainer Malzbender) writes: >From what someone else told me, the ISA spec says the bus clock should be >8.33 Mhz (not bytes!), but there are plenty of clones around which let you >run the bus faster than that (mine goes to 20 Mhz). The bus clock and the CPU >clock are generally at least somewhat decoupled. Does this mean I can replace the 16 MHz oscillator in my 386-33 (which is presumably divided by 2 to get 8 MHZ) by a 20 or 24 MHz oscillator to get faster performance without ill effect? What things might gag? I've always been curious about this since I have separate oscillators for the CPU and the bus. -- Mike Ressler - Infrared Photon Jockey ressler@galileo.ifa.hawaii.edu If at first you don't succeed, get a bigger sledgehammer.
lamb@brahms.udel.edu (Richard E Lamb) (03/23/91)
Things theat might "gag" are some of the adapters that plug into the bus. Some (many/most?) won't run much above 8 Mhz - which is the reason for the slow bus rates. Strangely enough, I've had more problems with real IBM cards than schlock clones...
rainer@boulder.Colorado.EDU (Rainer Malzbender) (03/23/91)
In article <12104@uhccux.uhcc.Hawaii.Edu> ressler@galileo.ifa.hawaii.edu (Mike "IR" Ressler) writes: > >Does this mean I can replace the 16 MHz oscillator in my 386-33 (which is >presumably divided by 2 to get 8 MHZ) by a 20 or 24 MHz oscillator to get >faster performance without ill effect? What things might gag? I've always >been curious about this since I have separate oscillators for the CPU and >the bus. > Chances are lots of those cheap Taiwanese clone boards plugged into your 'puter will choke since they weren't designed to run that fast. Unfortunately many of the Intel chips used in PC's (8255, 8253) have a sh***y bus interface, requiring long minimum read/write pulses and lots of time between sequential accesses. I never run my bus faster than 10 Mhz. I haven't looked into this too much, since when I want speed I just get on the horn to the YMP :-) But, hey, try it and see. -- Rainer Malzbender, PhD "It's not the bullet that kills you, it's the hole." Dept. of Physics (303)492-6829 -Laurie Anderson U. of Colorado, Boulder rainer@boulder.colorado.edu 128.138.240.246
phil@brahms.amd.com (Phil Ngai) (03/24/91)
scafidi@aramis.rutgers.edu (John Scafidi) writes: >In the Feb. 18 issue of EDN, J.D.Mosley states that the 16 bit AT bus >(ISA) limits the data transfer to a maximum of 8M bytes/sec. >Since the AT bus is 16 bits or 2 bytes wide, doesn't this mean that >you can perform IO at the rate of 1/2 Mhz ? Analyze your units. (8M bytes/sec) / (16 bits/transfer) = 1/2 million (somethings) (8M bytes/sec) / (2 bytes/transfer) = 4 million transfers/second >Can anyone >report on how good is the "AT Bus Design Book" by Annabooks in San >Diego? It is a good book, but probably too technical for you. -- Sun PC-NFS: for the engineer who really want a Sun and got a PC.