[sci.electronics] MOSFET Puzzle

lansford@tusun2.mcs.utulsa.edu (Wendell Wayne Lansford) (04/10/91)

The following problem was recently posed by my professor in Advanced 
Networks:
 
TRANSISTOR IN A BOX PUZZLE
 
               -------------
        +  ----|           |----  +
               |   Black   |
       Vin     |    Box    |    Vout
               |           |
        -  ----|           |----  -
               -------------
 
The black box contains ONLY one depletion-mode MOS transistor and 
NOTHING ELSE.  A sinusoidal voltage source, Vin, is connected to the
box as shown, and a measurement in the steady state reveals that the
magnitude of Vout is greater than the magnitude of Vin (ie |Vout| > |Vin|),
where Vout and Vin are phasors corresponding to ac voltages.  
Find how the transistor is connected and explain how such a voltage gain
is possible.  (Note:  The above is not just a "paper" result and can
be reproduced in the laboratory.)
 
 
Can anyone readily provide some insight into this problem?

Thanks!    

Wendell Lansford
lansford@tusun2.mcs.utulsa.edu

cl2n+@andrew.cmu.edu (Christopher Fleming Lane) (04/11/91)

Hi,
I have a clue as how to do this.  First you must realize that a MOSFET is a 
4 terminal device with the small signal equivilent below:

Gate   ---------------                ---------------------  Drain
                     Vgs             GmVgs     GmbVbs    Ro
Source -----------------------------------------------------
               Vbs
Bulk ---------------

Where Vgs is the gate to source Voltage, Vbs is the bulk to source Voltage,
GmVgs is the transconductance of the Gate-Source, GmbVgs is the
transconductance
os the Bulk-Source, and Ro is the output impedance.  Gm is large the Gmb.

If it is set up like

Gate --------- Drain
     -       -
     -       -
Source ------- Source

with source and bulk tied together, an input Vo would result in an output
of -GmVoRo, which will hopefully be bigger than Vo.

I hope this answers the question.  I may be wrong (no guarantees).
Later,
Chris Lane
cl2n@andrew.cmu.edu

grege@gold.gvg.tek.com (Greg Ebert) (04/12/91)

In article <1285@tusun2.mcs.utulsa.edu> lansford@tusun2.UUCP (Wendell Wayne Lansford) writes:
>The following problem was recently posed by my professor in Advanced 
>Networks:
> 
>TRANSISTOR IN A BOX PUZZLE
> 
>               -------------
>        +  ----|           |----  +
>               |   Black   |
>       Vin     |    Box    |    Vout
>               |           |
>        -  ----|           |----  -
>               -------------
> 
> [...]

Awright, how 'bout this :


A depletion-mode MOSFET is actually a 4-terminal device. It looks like this:


			o Drain
			|
               ----||---+---K|---
               |   Cgd  |       |
               | 	 \      *---o  substrate
       gate o--*        |       |
	       |        |       |
	       ----||---*--K|----
	           Cgs  |
			o  Source

 Those -K|- devices are parasitic diodes. The switch inside is controlled
 by Vgs: OFF if Vgs < Vp; on otherwise.

 Connect an AC source across the gate and substrate. Now connect the source
 and drain terminals together. Finally, connect an imagionary load across
 the source-drain terminal and the substrate. Look familiar ? It's a
 capacitive voltage doubler.

 Imagine the gate is negative with respect to the substrate. Cgs and Cdg
 are charged 'negatively', thus the MOSFET is pinched-off. In fact, you
 can now forget that it's even a MOSFET. Now let the gate go positive
 with respect to the substrate. There is no path to discharge Cgs & Cgd
 (thanks to the diodes), so the device remains pinched-off. Looking
 at the drain-source node, the voltage with respect to the substrate is
 the voltage on Cgs/Cgd PLUS the gate-substrate voltage. 

 Thinking about it some more, I think the issue of whether or not
 the MOSFET is pinched-off is irrelevant.

lansford@tusun2.mcs.utulsa.edu (Wendell Wayne Lansford) (04/12/91)

Your solution is interesting.  My professor, who originally solved the 
problem for an instructor in New York who was witnessing this
phenomenon in his use of MOSFETs, gave me his solution.   
The solution is rather tedious, but the theory is as follows:

The fact that the device is a transistor is only incidental to the observation
that it is a distributed RC structure.  Vinput is from the Gate to the 
Source and  Voutput is from the Drain to the Source (ie a typical connection).
The channel exhibits a total resistance, Rt.  The gate and channel form a 
distributed capacitor, C. The idea is that at some frequency, Vgd (Voltage
from gate to drain) will be 180 degrees out of phase with Vinput.  Noting 
that Voutput =  Vinput - Vgd, it can be seen that at this 180 degrees out
of phase frequency, Voutput will be greater than Vinput.  This "passive"
voltage gain phenomenon should be observed at frequencies around 1 GigaHz
for uncased, leadless devices. 


Wendell Lansford
lansford@tusun2.mcs.utulsa.edu