robertb@cs.washington.edu (Robert Bedichek) (04/26/91)
I am designing a node-board of a parallel computer based on the Motorola 88000 Hypermodule and I have a couple of questions that I hope someone can help me with. My machine will have a 40ns clock, but I am hoping to have it work at 30ns in case I can get faster Hypermodules in the future from Moto. The DRAMs are 4Mx9 80ns modules from Mitsubishi. 1. The design has two rows of DRAMs. I would like to get rid of the DRAM data buffers and put the 2-inputs-per-data-bit directly on my machine's bus. This bus is an S-Bus (from SUN). It is a CMOS-only bus (TTL devices have too much leakage current to meet the S-Bus spec). I have just two S-Bus slots, each can add at most 20pf. The two DRAM input/output pairs add a total of 26pf. All of this plus the other transceivers add up to about 100pf, which is less than S-Bus's maximum. The total wire length of a data line will probably be about 10 inches. I'm a little worried, I wonder if there isn't some gottcha with putting the DRAMs data inputs and outputs right on the data bus. 2. Have you heard anything about the AMD 29C668 DRAM controller? I've got all the literature on it and it looks great, but I'd really like to hear about people's experience with it. I'll be using CAS-before-RAS refresh and burst mode. 3. Have you heard anything about the 10ns 22V10 PALs from AMD? It seems so large to be so fast, before I completely commit to using these parts I thought I'd check to see if there was some problem with them. 4. How short would the distance from DRAM controller to DRAM address input have to be before one could drop the series termination resistors on the address lines? I will have 360pf per address line. If I limited the system to 16 MB instead of 32 MB, that would be 180 pf. This would save board space and maybe even get rid of the series termination resistors. Perhaps I could keep the maximum trace length to 3". Is this short enough? I know the calculations that one can do to try to answer this, but I'd like to hear from people's experience. Thanks for any help that you can lend. Robert Bedichek robertb@cs.washington.edu