GHK@NCCIBM1.BITNET ("Gary Hutchison") (08/02/89)
> > BTW, if the Applicard comes with any documentation or schematics which > diagram its operation, I would be curious to hear how it does interface to > the Apple. I'm always looking for the better mousetrap. > > Brian Willoughby > UUCP: ...!{tikal, sun, uunet, elwood}!microsoft!brianw > InterNet: microsoft!brianw@uunet.UU.NET > or: microsoft!brianw@Sun.COM > Bitnet brianw@microsoft.UUCP Brian, I have run a PCPI card as well as a Softcard and was impressed by both at one time or other. I feel that the PCPI card had more flexibility than the Softcard. There were more configuration options for the PCPI card which helps alot when there are no BIOSs available for either. Getting back to your question, it has been a while since I have written much for the PCPI card but here goes. The Z80 and the 6502 run on two completely different clock cycles. tThe Z80 can run up to the board and memory access limit and not be directly affected by the 6502 chugging along at 1M. However, all I/O is performed by the 6502; thus reducing throughput on I/O bound processes. The bios, from the Z80 side, is a bunch of routines that pass command words and blocks of data to the 6502 via a Z80 I/O port. Several Zilog ports are used, some for data and some for status of the data ports. From the 6502 side, interrupts are generated and the commands and data are memory mapped to I/O locations in the Apple I/O slot address space depending on the location of the card. Development of I/O drivers requires, in many cases, both Z80 and 6502 assembler programming. The interface is "slick" because there is no need to rush to read data from the port if you write your dirvers properly; let the Apple buffer the data (it will use all the memory you have installed) and read it at your leasure. 6502 interupts are generated for both read and written data to the channel port between the 6502 and the Z80. I hope this answers your questions, if not let me know. Gary Hutchison Unisys GHK@NCCIBM1.BITNET