[comp.sys.m6809] CoCo CPU Speed Check

ottmar@micomvax.UUCP (02/25/87)

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Some time ago, someone asked the net how to determine if a CoCo was 
running at double speed. I didn't see any answers posted, so I assume
that there is no known flag maintained by hardware.

In the absence of such an indicator, I would suggest that the next-best
thing is subroutine DBLCHK ("Double-speed Check") listed below. It takes
at most about 1/7 of a *millisecond* to execute, and will return with
the carry flag set if the CoCo is operating at the standard (i.e. slow)
.894 MHz speed.

To avoid some confusion I should mention that this subroutine is only
applicable to the CoCo III environment. It is checking for double-speed
access to RAM which for CoCo II was unusable anyhow due to loss of
video refresh.

DBLCHK uses the CoCo's video scan-line duration (63.5 microseconds) as a
timing reference. Every 63.5 us. bit 7 of $FF01 is set by the video 
timing hardware; the bit can be reset by loading $FF00. This parallels 
the 16.7 millisecond timer which uses $FF03/$FF02 instead of $FF01/$FF00 
(I don't have my references handy, so you might want to double-check
those addresses ...). Note that the above mechanism is independent of
whether or not the 16.7 ms or 63.5 us. IRQs have been enabled.

DBLCHK waits for the end of a scan line and just *counts* until the next
scan line ends. At .894 MHz the count is always 5 or 6 while at 1.788 MHz
the count is consistently 11. It uses the value of 9 as a threshold.

	DBLCHK	CLRA		Initialize counter to 0
		ORCC	#$50	Disable interrupts
		LDB	$FF00	Clear the scan-line flag
	WAIT	LDB	$FF01	Wait for bit 7 to be set
		BPL	WAIT	 (i.e. end of scan line)
		LDB	$FF00	Clear the scan-line flag, again
	COUNT	INCA		Start counting ...
		LDB	$FF01	Keep counting until the
		BPL	COUNT	  end of the scan line
		ANDCC	#$AF	Re-enable interrupts
		CMPA	#9	Set carry if slow speed
		RTS

It may be possible to apply the above technique to CoCo II's intermediate-
speed mode (single-speed RAM, double-speed ROM). You would have to call the
BASIC ROM delay routine - the one that consists of LEAX -1,X / BNE .-2 / RTS.
This of course leads to another question : on a CoCo 2, how can you tell if
the upper 32K is mapped into ROM ... ?

Does anyone out there have any comments on routine DBLCHK ? Is there an
easier or faster method of checking CPU speed?


Ottmar Bochardt		... philabs!micomvax!ottmar