greg@cantuar.UUCP (G. Ewing) (03/07/89)
During a recent fit of idle curiosity, I came across some articles describing the microprocessor used in many of HP's handheld calculators from the HP-35 on. It occurred to me that the design is actually quite RISCy in some ways. All instructions are the same length (10 bits) and execute (I think) in one cycle (if you count a 56-bit serial shift as a "cycle"). All arithmetic/logic operations are done in registers. Other interesting features include a (very!) split I/D space (10 bit ROM for instructions, 56-bit registers and data memory) and an instruction set optimised for BCD arithmetic on various fields of decimal floating-point numbers (mantisssa, sign, etc.) Anyway, I think it's kind of cute. Does anyone know where I can find out more about it? Ideally I'd like enough info to write a simulator for it (okay, so I'm wierd). The articles I have (from the HP Journal) don't go into much detail. Any help appreciated, Greg Ewing Internet: greg@cantuar.uucp Spearnet: greg@nz.ac.cantuar Telecom: +64 3 667 001 x8357 UUCP: ...!{watmath,munnari,mcvax,vuwcomp}!cantuar!greg Post: Computer Science Dept, Univ. of Canterbury, Christchurch, New Zealand Disclaimer: The presence of this disclaimer in no way implies any disclaimer.
cruff@ncar.ucar.edu (Craig Ruff) (03/07/89)
In article <1068@cantuar.UUCP> greg@cantuar.UUCP (G. Ewing) writes: >During a recent fit of idle curiosity, I came across some articles >describing the microprocessor used in many of HP's handheld >calculators from the HP-35 on. >... Ideally I'd like enough info to write a >simulator for it (okay, so I'm wierd). The articles I have (from >the HP Journal) don't go into much detail. Ah yes. When I was a college student with nothing better to do, I wrote just such a simulator for the HP-41C. I got the description of the processor and the ROM listings from the newsletter of that calculator club (I forget the name exactly) that dug into the guts of programmable calculators to see what was there. Anyway, I programmed it on an HP 9825 desktop (one line display!) we had in the chem lab. I had to type in all of the instructions in hex by hand (a few K!). I got it to the point where it would actually do stuff like the calculator would. Too bad I didn't make copies of the articles and the code and data files. I could have put it on much more powerful computers! :-) -- Craig Ruff NCAR INTERNET: cruff@ncar.UCAR.EDU (303) 497-1211 P.O. Box 3000 CSNET: cruff@ncar.CSNET Boulder, CO 80307 UUCP: cruff@ncar.UUCP
jthomp@hemaneh.Central.Sun.COM (Jim Thompson Sun Dallas SWAN Engineer) (03/08/89)
In article <1068@cantuar.UUCP> greg@cantuar.UUCP (G. Ewing) writes: >During a recent fit of idle curiosity, I came across some articles >describing the microprocessor used in many of HP's handheld >calculators from the HP-35 on. >... Ideally I'd like enough info to write a >simulator for it (okay, so I'm wierd). The articles I have (from >the HP Journal) don't go into much detail. Hmm, I've got one (a HP-41 simulator), around here somewhere. If I remember correctly, it even outputs bar-code (TeX source), so you can load the programs into your real HP. You could even use 'symbolic programming' (peek & poke on the 41). Last time I worked on it, I was attempting a window based tool for it. (The ultimate test would be making the goose fly backwards, no?) Perhaps I should look at putting it together and giving it to Rich Salz? Naw.. who would want to run HP-41 simulations on their Cray? :-) Jim Thompson jthomp@central.sun.com "I woudn't recommend sex, drugs, or insanity Network Engineering for everyone, but they've always worked for me." Sun Microsystems -- Hunter S. Thompson
graeme@zen.UUCP (Graeme Cawsey) (03/08/89)
In article <1068@cantuar.UUCP> greg@cantuar.UUCP (G. Ewing) writes: > >It occurred to me that the design is actually quite RISCy in some >ways. All instructions are the same length (10 bits) and execute >(I think) in one cycle (if you count a 56-bit serial shift as a >"cycle"). All arithmetic/logic operations are done in registers. On the Nut series of CPUs (HP-41, HP-1x), and I presume on the earlier versions, not all instruction are one word in length. Load immediate (LDI), power off (POWOFF) and absolute branch (CGO & NCGO) and calls (CXQ & NCXQ) are all two word instructions taking two cycles and the ROM fetch instruction (RDROM) is a one word instruction that takes two cycles. Graeme Cawsey (graeme@zen.co.uk) Zengrange Ltd., Greenfield Rd., Leeds, England, LS9 8DB. Tel : +44 532 489048