chris@mimsy.UUCP (Chris Torek) (03/08/89)
In article <1532@ncar.ucar.edu> cruff@ncar.ucar.edu (Craig Ruff) writes: >Ah yes. When I was a college student with nothing better to do, >I wrote just such a simulator for the HP-41C ... on an HP 9825 desktop >(one line display!) we had in the chem lab. ... Too bad I didn't make >copies of the articles and the code and data files. I could have >put it on much more powerful computers! :-) Actually, the 9825A was, for its time, rather amazing. As I recall, it had a custom LSI 16-bit silicon-on-sapphire CPU. The nastiest limitation (aside from the `pushbutton' keyboards on the original machines) was that there were only 4 slots for cartridge ROMs. (You could still squeeze in five options by using a `binary tape'. We needed that a few times to run the plotter off the HP3060A system....) (HPL was weird. Remember r-variables? But at least with the A.P. ROM, you got functions and local variables.) -- In-Real-Life: Chris Torek, Univ of MD Comp Sci Dept (+1 301 454 7163) Domain: chris@mimsy.umd.edu Path: uunet!mimsy!chris
clw@hprnd.HP.COM (Carl Wuebker) (03/10/89)
In response to the title, the 9825A processor was something called the
BPC hybrid -- composed of 3 chips mounted on a ceramic? plate. The chips
were the BPC (Binary? Processor Chip), the IOC (I/O chip) and the EMC (Extended
Math Chip). The 3 chips cooperated as an instruction slice computer -- the BPC
(if I remember) did the instruction fetch and all integer instructions, the IOC
did the I/O operations and the EMC did BCD math (I'm not sure if it did X or /).
Anyway, while the BPC might have been considered a RISC chip (it used a
minor variant of the HP2100 (later HP1000) instruction set), to my knowlege
it was never used without either the EMC or IOC in a product. The 9845A,
the next model, was a 'dual-processor' computer composed of a Peripheral
Processing Unit (PPU, it was a BPC and an IOC) and the Language Processing
Unit (LPU, it had a BPC and an EMC). 4-bit processors (4004, 4040) had been
out for quite a while (1971), 8 bit processors were out but new (1975 or so);
the 9825A may have been the 1st product to use a 16-bit chipset commercially.
We had a neat history string in the HP notesgroups about a year ago. The
9830A, predecessor to the 9825A, ran a similar instruction set -- implemented
as a 16-wide bit serial processor which ran entirely out of the microcode in
a 256-byte ROM! I saw the flowchart for that ROM's state machine once --
it was incredible what those engineers were able to do with so little!
Thanks,
Carl "it even used a 6MHz +/-10% FM clock!" Wuebker
* clw@hprnd * HP Roseville Networks Division * (916) 785-4296 *daver@hpcvca.HP.COM (David Rabinowitz) (03/11/89)
>On the Nut series of CPUs (HP-41, HP-1x), and I presume on the earlier >versions, not all instruction are one word in length. Load immediate (LDI), >power off (POWOFF) and absolute branch (CGO & NCGO) and calls (CXQ & NCXQ) >are all two word instructions taking two cycles and the ROM fetch instruction >(RDROM) is a one word instruction that takes two cycles. The original processor had only single word instructions which were referred to as "states" (the machine was designed by EEs who thought in terms of state machines, so in a way it really was a RISC machine). It was tightly optimized for the HP-35, and as a result the entire calculator was implemented in only 768 states. By the time the 41C CPU (originally named Nutmeg) was designed, several generations later, the instruction set had been enhanced to include multi-state instructions. There is no write-to-ROM instruction, but a read-from-ROM-at-a-computed-address instruction was added to allow use of ROM tables and efficient storage and access of user code in ROM. The original processor had a 1-state load immediate instruction which loaded a single digit, and all jumps were one state (7-bit address offset). The 41C and CV calculators have 12K states and the 41CX has 24K states of code in the mainframe. By the way, I believe the first 1-chip 16-bit microprocessor in production was the MC^2 chip which was released in 1976. The part was CMOS in an SOS (silicon on sapphire) process. It is described in Osborne's volume 2 though none were ever sold except inside HP products.
boyne@hplvli.HP.COM (Art Boyne) (03/17/89)
Regarding the HP 9825, most of what Carl Wuebker posted was correct, but a few points can be made: The BPC was *not* a RISC machine. It was based on the classic mini- computer architecture of the HP2100, which itself was closely related to the old PDP-8 style machines. It was implemented in NMOS, not the silicon-on-sapphire that Chris Torek suggested (that processor was the short-lived MC^2). The BPC did initiate the instruction fetch, but, in true co-processor fashion, each chip did an instruction decode to determine if it was the proper "execution unit". The BPC did do integer multiply/divide. The EMC was strictly for floating point. It didn't do complete multiplies or divides, only provided subset instrctions which were part of a longer software routine - something like 15 or so FMUL instructions were required to multiply 2 floating point numbers. The BPC *was* used without either the IOC or EMC in at least the 9871 daisy wheel printer, introduced at about the same time as the 9825 itself. Also, I believe the BPC/IOC combination (without the EMC) was used in the HP64000 development systems. Credentials: I hired on to HP 2 months after the 9825 was introduced, and spent the next year+ doing a 9830-BASIC language ROM set for it (called the 9831). Art Boyne, boyne@hplvla.hp.com