[comp.sys.hp] HP Technology conference impressions

woolstar@nntp-server.caltech.edu (John D. Woolverton) (04/19/91)

   I attended an interesting session on the HP PA-RISC strategy
and the HP tech conf. wednesday in Anaheim.  After adjusting to
the annoying neon lights and other marketing junk on stage, and
tuneing out the Sun and MIPS bashing, I picked up a few
interesting notes.

   First of all, HP has been aquiring (eating) quite a few more
companies than I realized.  Along with Apollo, HP has aquired
the skills of quite a few software companies (like Multiflow) and
has geared them to help it with compiler and software efforts.
It's seems like it may be working.

   HP mentioned two partnerships, as wells as the hopes of
what each would bring.
   * Samsung -- bring PA-RISC below $5,000 on the desktop
                probably without the TI floating point.
   * Hitatchi -- taking advantage of the BiCMOS process to
                 crank clock speed even further ( > 90MHz ? )

   They also presented some interesting details about some
of the designs of the sub systems.  Supposedly, the Memory
manager (viper) has the circuitry necissary for using standard
memory for Z-buffering.  No mention was made of how applications
could take advantage of this.
   Compiler advances included a tool for evaluating code on
test data, to build up information about scheduling and branch
prediction.  No mention of what language support was available
or cost.
   EISA support was discussed, and although it isn't on the
fast bus, it looks as if it's going to be fast enough to support
periferal needs for quite some time.  Driver support is supposed
to be coming real soon.

   I give HP top marks as well for taking the time and effort
to explain benchmarks (noticable SPEC), and stressing that the
best aproach is for the customer to benchmark his own application.
Of course, with their current performance, they can afford to
be generous.

   What I didn't like was all the double takes, technical and
marketing wise.  After going on about how great the Z-buffering
support was, the graphics line doesn't even use it.  After going
on about how important it was to have complete inhouse fabbing
for privacy, experience and control, they mentioned that
TI fabbed the FPU and the partnership with Hitachi for it's BiCMOS.
   And of course the $7,000 for two additional DACs, to get color.
(I realize that the color option is more than this, but the price
 is not realistic.)

   What I'm wondering is, with the EISA bus on this machine,
if someone might take the trouble to get a SVGA card working, or
better yet the $5,000 full color 3D visualization card from SGI.

   $12,000 + $5,000 plus some minor stuff, to get a system
that is better all around than my 4d35G sounds like a great deal.

        woolstar@cobalt.caltech.edu
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