bobc@killer.UUCP (Bob Calbridge) (01/17/88)
Those of you who have mentioned the upgrade to the vdc might be able to answer a question concerning that chip. There is a register that controls the starting address of the character set. It is the upper three bits of register 28 that does the controlling. The article in The Transactor did not specify just how this works. If the available memory were only 16K long then I would assume that it controlled the setting in steps of 2K. But if the chip can address up to 64K then it could be steps of 8K. Does anyone know which of these it is? Is there a better source on the VDC with a greater explanation on the use of each register? The article was informative but not quite enough. Thanks in advance. Best, Bob
fred@cbmvax.UUCP (Fred Bowen) (01/19/88)
In article <2951@killer.UUCP>, bobc@killer.UUCP (Bob Calbridge) writes: > Those of you who have mentioned the upgrade to the vdc might be > able to answer a question concerning that chip. There is a > register that controls the starting address of the character set. > It is the upper three bits of register 28 that does the controlling. > The article in The Transactor did not specify just how this works. > Bob You had to ask. Simply put, the starting address of the character data can be on 8K boundarys (usually) or sometimes on 16K boundarys. Since I suspect that is not explanation enough for true techies, here's the poop: During the visible part of the frame, the 8563 (8568) reads character data from display memory. The address of each word of character data is determined by register 28 (bits 7-5), bit 7 of the attribute byte, the character pointer, and the internal scan line counter. There are two possible ways to determine the character data address, determined by the contents of register 9, the character vertical total. (1) If the contents of R9 is less than 16, then four bits of the internal scan line counter will be utilized, and the character data address will be calculated as follows: BIT# 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------- -- ----------------------- ---------- SOURCE R28(7-5) attribute character pointer scan line ctr bit 7 If attributes are disabled (R25 bit 6), then bit 12 of the character data address will be 0. Each character defined in display memory will consist of 16 bytes (hence the 4 bit scan counter), even if the number of scan lines actually displayed is less than 16. (2) If the contents of R9 is greater than 15, then five bits of the internal scan line counter are utilized, and the character data address will be calculated as follows: BIT# 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -------- -- ----------------------- ------------- SOURCE R28(7-6) attribute character pointer scan line ctr bit 7 If attributes are disabled (R25 bit 6), then bit 13 of the character data address will be 0. Each character defined in display memory will consist of 32 bytes (hence the 5 bit scan counter), even if the number of scan lines actually displayed is less than 32. So begins a new year. -- -- Fred Bowen uucp: {ihnp4|rutgers|caip}!cbmvax!fred arpa: cbmvax!fred@RUTGERS.EDU tele: 215 431-9100 Commodore Electronics, Ltd., 1200 Wilson Drive, West Chester, PA, 19380