[comp.sys.cbm] Faster IEEE-488 devices

erd@tut.cis.ohio-state.edu (Ethan R. Dicks) (02/16/89)

In previous articles, many people put forth suggestions regarding speeding
up IEEE transfers.  I have not been able to locate one, but Motorola
produced (produces?) a chip called the MC68488, an eight-bit I/O bus chip,
designed for use with the 6809 which provides full IEEE-488 handshaking and
supports the DMA used back in the 6809 days (I don't think it is of much use
these days).  This chip plus the two chip IEEE-488 buffer set (not the same
chips used in the PETs, these chips came one for the data lines, one for
the control lines), or the three chip IEEE-488 buffers used in the PETs
will provide an IEEE connection, waiting for a peripheral bus to talk to.

I have thought about building a prototype card for the C64 or the Amiga,
but I have never been able to get a sample of this chip (distributors
tend to like to sell $100+ orders)

I have literature on this chip.  If you are interested, reply and if there are
enough requests, I will post a summary of the spec sheets.  If there are not
enough request, I will e-mail a summary.

-ethan
-- 
Ethan R. Dicks       | ######  This signifies that the poster is a member in
Software Results Corp|   ##    good sitting of Inertia House: Bodies at rest.
940 Freeway Drive N. |   ##
Columbus OH    43229 | ######  "You get it, you're closer.

dak@ut-emx.UUCP (Donald A Kassebaum) (02/16/89)

	The older Pet and CBM computers used the old MC 488 buffers which
	handled 4 IEEE488 line, with and input and an output for each
	IEEE 488 signal.  The IEEE 488 data line input whent to half of
	a 6520, and the output line when to the other half of the 6520.
	The control lines which were used went to the 6522.  The newer
	IEEE488 buffers have a dirction pin associated with input/output.

	The mc68488 is indeed a nice chip, but it is a listener/talker.
	It is used in many Ieee488 instruments.  In order to make it a
	controler, addition hardware is required to handle ATN, SRQ, IFC,
	REN and EOI in certain cases.

	It is too bad that MC didn't see fit to add these features to the chip.

	Dak

stephenc@tekgen.BV.TEK.COM (Stephen Coan ) (02/22/89)

In article <35528@tut.cis.ohio-state.edu>, erd@tut.cis.ohio-state.edu (Ethan R. Dicks) writes:
> In previous articles, many people put forth suggestions regarding speeding
> up IEEE transfers.  I have not been able to locate one, but Motorola
> produced (produces?) a chip called the MC68488, an eight-bit I/O bus chip,
.
.
.
> Ethan R. Dicks       | ######  This signifies that the poster is a member in
> Software Results Corp|   ##    good sitting of Inertia House: Bodies at rest.
> 940 Freeway Drive N. |   ##
> Columbus OH    43229 | ######  "You get it, you're closer.

The 68488 chip is buggy.  It also adheres to the 1975 version of the
standard, not the later versions (1978, 1980, 1987).  The major test
equipment manufacturers have given up on using this chip in new designs
(Fluke, HP, Tektronix, etc.).  I also would not recommend the NEC 7210 chip
due to many problems in it as well.   The bus does support bus speeds of up
to 1Mbyte per second, usually with a DMA controller involved.  The other
choices avaiable are the TI-TMS9914A and the INTEL-8291A chips.  The
interface chips to the IEEE-488 most used are the 75160, 75161 chips by TI
or National.  My background is that I have been extensively involved in GPIB
testing for Tektronix for 10 years and have worked with both TI and Intel in
getting them to revise their chips to their current "A" versions.  I have
also participated in the generation of the newest IEEE versions of the
venerable GPIB standard, the ANSI/IEEE Std 488.1 and 488.2 1987. 

If anyone wants details on problems, drop me a line and I'll send you
information.  That information does not need to be expounded here.

  Stephen L. Coan
  Tektronix, Inc
  Beaverton, OR  97077
  stephenc@aice.bv.tek.com
-- 

			Steve Coan
			tektronix!tekgen!stephenc
			(503) 627-1794

izot@f171.n221.z1.FIDONET.ORG (Geoffrey Welsh) (02/24/89)

 > From: stephenc@tekgen.BV.TEK.COM (Stephen Coan )
 > Message-ID: <4125@tekgen.BV.TEK.COM>
 >
 > The 68488 chip is buggy.  It also adheres to the 1975 version of the
 > standard, not the later versions (1978, 1980, 1987).
 
   You have to keep in mind that the IEEE-488 bus used by Commodore was a 
non-standard extension.
 
 > The bus does support bus speeds of up
 > to 1Mbyte per second, usually with a DMA controller involved.
 
   The Commodore implementations discussed here do handshaking via parallel 
I/O lines controlled by a 1 MHz 6502 (i.e. no hardware support beyond the 
MC3446 drivers). While discussing the mandated limits of IEEE-488 performance 
is certainly interesting, it isn't really applicable here.
 
 > The other
 > choices avaiable are the TI-TMS9914A and the INTEL-8291A chips.  The
 > interface chips to the IEEE-488 most used are the 75160, 75161 chips by TI
 > or National.
 
   I'm not familiar with the TI or NSC chips (I may have been and forgotten 
since); the Intel chip set, while probably usable for a Commodore-oriented 
application, is far too expensive for most of the peoplelooking to play around 
in this field.
 
 > I have
 > also participated in the generation of the newest IEEE versions of the
 > venerable GPIB standard, the ANSI/IEEE Std 488.1 and 488.2 1987.
 >
 > If anyone wants details on problems, drop me a line and I'll send you
 > information.  That information does not need to be expounded here.
 
   I don't suppose you could put me on the mailing list for a copy of those 
standards? I'd really appreciate being brought up-to-date.
 
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