kent@lloyd.camex.uucp (Kent Borg) (08/06/88)
The question was "what is the instruction cache in the 68020?".
An Answer:
When the 68020 fetches an instruction, it keeps a copy in the CPU (in
the cache) so that next time that instruction is needed it will be
available without having to access the bus, this makes the access to
that instruction much faster.
Slight complication (with caches): the CPU cannot keep copies of ALL
the instructions (how many megabytes do you expect?) so it only keeps
the last few that have been accessed. The benefit comes with loops
that are short enough to fit in the cache. The entire loop might be
able to run with with only data transactions on the bus, no
instruction fetches at all (after the first time through the loop).
Slight complication (with 68020 Macintoshes): What happens when old
ill-behaved naughty program X writes some data to memory, memory that
happens to be holding the program, memory that the CPU thinks it has a
correct copy of in the cache? The program doesn't work, that's what
happens. Motorola could have designed the 68020 to invalidate a cache
entry in cases like this, but they didn't: It is the programmer who
writes the self-modifying code who is committing the heretical and
imprudent act.
{ --Begin aside-- }
There are well known religious laws against writing self-modifying
programs. If you can't resist this sin, join the world of lisp where
it is not only not a sin but one of the things in which lisp programs
specialize: writing other lisp programs. Whoops--this is not a lisp
group.
{ --End aside-- }
Kent Borg
kent@lloyd.uucp
or
husc6!lloyd!kent