amanda@intercon.uu.net (Amanda Walker) (08/10/89)
Disclaimer: I don't work for a semiconductor manufacturer, but from my experience in working with DRAMs, I believe the information below is pretty accurate. The speed ratings on chips are absolute worst case across a particular temperature range. In practive, this seems to mean that they are tested and then rated at how fast they run plus a margin allowing for aging and so on. A 150ns chip will run at 120ns. Most of the time. If it doesn't get too hot. Or too old. Usually. :-). It's sort of like using the little punches that let you format 800K disks as FDHD disks. Yeah, it works, sort of, but it's definitely "proceed at your own risk" territory. Apple's memory access circuitry in their 020 and 030 machines is designed for memory that is *guaranteed* to have a 120ns maximum access time or less. Why do you need 120ns access time? The master clock speed is (just under) 16MHz. Each memory cycle takes 3 clock ticks without wait states, or 4 clock ticks with wait states. Each tick is 62.5ns. Now, since the cycle time (i.e. the minimum time between successive accesses) for DRAMs is usually about double the access time, this means that with one wait state you need DRAMs with a cycle time of under 250ns. 120ns chips will just barely give you this; 150ns chips won't (they need about 300ns). One of the nice things about the 68030 is that it has a "burst mode" that can be used with "static column" DRAMs, which grabs four successive values out of the chip in an extended read cycle (which takes a lot less time than four successive normal read cycles). Hopefully future 030 machines will take advantage of this... -- Amanda Walker InterCon Systems Corporation -- amanda@intercon.uu.net | ...!uunet!intercon!amanda