D.r..Arthur@f2.n290.z1.FIDONET.ORG (D.r. Arthur) (04/01/90)
After seeing the upteenth Sieve, Whetstone, Drystone, Gogglebox benchmark
programs, the conclusion is that to get a real understanding of
performance of any system be it Sun SparcStation 1, Macintosh //fx,
Silicon Graphics Personal Iris on and on and on. One should throw out
the software, or atleast the stopwatches or what ever timer used and
publish a set of ratio's.
The Ratio's are to be determined by running in ascending order of
importance to most significant bit of either eight or sixteen signal
analyzer lines connected to various chip enable / central processor
status lines to get a direct composite reading of which pieces of silicon
or gallium / arsenide or even more exotic die material to spotlight where
system performance gains can be most effective.
For example, in an adaptive RAM memory access speed assertion of CAS or
Static Column, which one yields the most significant differential when
the memory goes from 80 nanoseconds to lets say 70 nanoseconds?
Will the DMA get or take away the added performance? How about parallel
operations, like DMA to peripheral while cache code / data is spinning
away in the 68030 / 68040? Signal line analysis would really point to
where the real action is, and the code being run can be trojan horsed to
exercise various subsystems and then go broad range with a cpu or
wholistic system intensity that pushes the electrons [let us hope
photons] to the ultimate in gate manipulating speed.
Are there any engineers in the house with a valid [not Valid] opinion to
implementing this? Icing on the cake is to present the analysis with
nice three - d graphics from software like Wingz with the impact of each
subsystem and composite access score with a timeline and code notes.
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Zoo System BBS (515) 279-3073 9600 V.32
Zone of Performance Users with optionally performing Wetwarez
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