willing@ICSL.UCLA.EDU (Scott Willingham) (08/08/89)
Does anyone out there happen to know the optimum decoupling capacitor value for 1Mbit DRAMS? If so, do you also know of a good supplier for them? Thanks, Scott D. Willingham
logajan@ns.network.com (John Logajan) (08/08/89)
willing@ICSL.UCLA.EDU (Scott Willingham) writes: > Does anyone out there happen to know the optimum decoupling > capacitor value for 1Mbit DRAMS? If so, do you also know of a > good supplier for them? I've constructed RAM boards using .01uf per memory chip, but I usually use 0.1 uf. It is usually the number of outputs on a chip that determine the power glitch during switching. A single bit ram needs less bypassing than a ram with 8 data lines. But 0.1uf should be fine for your purposes. Keep the leads short! And keep the caps near the chips. Everybody sells 0.1uf caps!!!!!!! -- - John M. Logajan @ Network Systems; 7600 Boone Ave; Brooklyn Park, MN 55428 - - logajan@ns.network.com / ...rutgers!umn-cs!ns!logajan / john@logajan.mn.org -
landry@enginr.dec.com (08/09/89)
In article <1534@ns.network.com>, logajan@ns.network.com (John Logajan) writes... "willing@ICSL.UCLA.EDU (Scott Willingham) writes: "> Does anyone out there happen to know the optimum decoupling "> capacitor value for 1Mbit DRAMS? If so, do you also know of a "> good supplier for them? " "I've constructed RAM boards using .01uf per memory chip, but I usually use "0.1 uf. It is usually the number of outputs on a chip that determine the "power glitch during switching. A single bit ram needs less bypassing than "a ram with 8 data lines. But 0.1uf should be fine for your purposes. "Keep the leads short! And keep the caps near the chips. Everybody sells "0.1uf caps!!!!!!! " This isn't quite true! The decoupling needs of dynamic RAMs have little to do with the output drivers. By far the biggest current changes occur when RAS turns on and off, not when the outputs are enabled. 0.1 uf caps are fine for decoupling 64K RAMs but 0.33 uf caps (multilayer ceramic) should be used for 256K and larger devices. AVX has a technical report that shows there to be quite an improvement in power noise by going to 0.33. At first we thought it was AVX marketing trying to sell us their new small 0.33 caps so we repeated the tests on our own memory boards. Turns out they were absolutely right! Here are some numbers out of their report (for 256K RAMs): cap value(uf) total voltage drop (mv) 0.068 130 0.1 115 0.22 95 0.33 85 0.47 80 (Diminishing returns above 0.33) chris
logajan@ns.network.com (John Logajan) (08/09/89)
In article <3958@shlump.nac.dec.com>, landry@enginr.dec.com writes: > cap value(uf) total voltage drop (mv) > > 0.068 130 > 0.1 115 > 0.22 95 > 0.33 85 > 0.47 80 Consider that the threshold voltages for TTL levels are 0.8 and 2.4, and closer to the rails for cmos -- then the difference between 0.115 and 0.085 (.03 volts) doesn't seem so bad. I agree that the noise margins are better for .33, but are they better enough? As an aside, one our technology guys was telling me that bypass caps of any size or type are virtually useless for eliminating the noise components above about 300mhz. Fortunately most logic is more prone to lower frequency (lower than 300mhz!) glitches than to higher frequency glitches -- after all, if it could respond that fast, people would use it in their Cray's instead of their ST's. -- - John M. Logajan @ Network Systems; 7600 Boone Ave; Brooklyn Park, MN 55428 - - logajan@ns.network.com / ...rutgers!umn-cs!ns!logajan / john@logajan.mn.org -