[comp.sys.atari.st] CMI Processor Accelerator Board

stevef@well.UUCP (Steven Robert Fordyce) (08/16/89)

> I can report a success story at installing the CMI accelator board.

[STuff deleted]

> One question... the red fly-wire, documentated as connected to R4
> on the 520st, and un-connected on the Mega-st... what is its purpose?
> At least for me, the board seems to work regardless of whether or not
> the red wire is connected.  My copy of the st schematics (which admittedly
> might not match the motherboard revision I have) shows R4 as being in
> the midi data current loop circuitry.

This is the interupt for the blitter.  That's why it isn't needed on a
Mega, which already has a blitter.  Of course, it is only needed on a 520,
or 1040 if a blitter is installed on our board.

> A note on the manual... the way I read it it implies that you get 16mhz
> operation by closing the jumper, and 8mhz by leaving it open.  However
> on my system it's just the opposite; 8mhz when the jumper is closed,
> 16mhz when it's open.

What you said is correct: the manual is in error.  Sorry!  We are currently
rewriting the manual.

> What are the recommended parts to use the fastrom sockets directly on the
> board?

Standard 1 megabit (128k x 8), 200 ns or faster parts.  These will be
available from us programed with 1.4 as soon as we get a license from
Atari, which we expect real soon now.

> What is the definition of the "expansion" pins?

We will be anouncing an expansion product that will plug into that when we
are done with it.  But in any case, here is the pinout:

			Pin	Definition
			 1	+5
			 2	A04
			 3	A03
			 4	A02
			 5	A01
			 6	EN1*
			 7	EN2*
			 8	UDS*
			 9	LDS*
			10	AS*
			11	DTACK*
			12	GND
			13	GND
			14	GNB
			15	NC
			16	D00
			17	GND
			18	+5
			19	D01
			20	D02
			21	D03
			22	D04
			23	D05
			24	D06
			25	D07
			26	FC0
			27	FC1
			28	FC2
			29	IPL0*
			30	IPL2*
			31	RESET*
			32	READ
			33	8M
			34	GND

If this seems like an odd collection of signals, it is because we had a
specific purpose in mind for the connector and we included only those
signals we needed for that purpose.  The row of pins starting with the pin
closest to the CPU are numbered 1-17.  The next row is 18-34, with pin 34
next to pin one.  EN1 and EN2 are two decoded addresses.  8M is a buffered
8 MHz clock.


By the way, the 1040 version of our board will be shipping next week.

						Steven R Fordyce
					   uunet!sequent!calvin!stevef

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