emmo@moncam.co.uk (Dave Emmerson) (08/20/89)
Sorry for posting this here, my mail seems to be bouncing a lot lately, I'll try to make it generally interesting to compensate.. Firstly, the guy in Alaska enquiring about the 2/4 Mb expander board : There are none left, I can't post you the photography without a commitment to run a batch, but if you mail me a fax number, I'll gladly fax you a copy so's you can see what's what. Your machine sounds like Harry's so should be OK. Alternatively, I can snailmail you a set of 'stats. Two or three people have asked about the possibility of going beyond 4Mb by adding a second MMU. Without having more info on the internals of the MMU, I can't really comment, but physically this would be a messy job. A cleaner solution for 8Mb is simmering at the back of my tiny cranium at the moment. If anyone cares to experiment/comment, it goes a bit like this: A22 is disconnected from the MMU, and the MMU's A22 pin is tied low. It now can't distinguish between the first and second 4mb (nor between the 3rd and 4th, but this is irrelevant to our purpose). A22 is then ORed with each of the 4 cas_ lines in a 74F32. The 4 resultant outputs are used to replace the existing cas_ lines to your existing 4Mb. You should try this first, to make sure your ST still works reliably. I have heard rumours that some models may have marginal timing. If yours has, this extra 5nS may make it unreliable. Soak test it like this for a few days. NB: don't forget to add those series resistors in each cas_ line! If my guess is correct, you should be able to read garbage from the 2nd 4Mb space without your ST crashing. If not, let me know, and I'll try to check it out. (Anything written to that area should just vanish) Adding the 2nd 4Mb is then fairly simple, all the connections are paralleled with the first 4mB EXCEPT the 4 cas_ lines. These are obtained by inverting A22 in a 74F04, and ORing the result with the 4 ORIGINAL cas_ lines in another 74F32. The resultant outputs are the new cas_ lines for the new memory. The new 4Mb is capable of all the DMA functions of the original, but you have a tiny bit more work to do yet. Because the TOS only looks for up to FOUR Mb, you'll have to write a small patch to modify some of the system variables, to get all 8Mb in use, and this code will have to be run immediately after booting. I don't have a copy of the developer's manual handy, so I can't say how many, nor which ones. Quite likely you'll find it easiest to refer to the disassembly listing for the TOS and pick a suitable point to re-enter it at with one register changed to hold the new RAMTOP, doing most of the cold reset over again. If you do, don't forget to make your patch check to see if it's already been run, or you'll loop forever! I can't actually check this out myself, Harry is still on hols, and I doubt if he feels he'll need (or can afford) 8Mb anyway, even running EMACS. Where you will actually physically put all this extra hardware is of course another matter. If your 4Mb expansion board uses DIL 1Mbit memories, you'll probably be able to piggyback the new ones. Lastly, a note for those debating multitasking: Since multitasking code has to be relocatable, all addressing has to be of the PC-relative type. On a 680x0 this limits addressing range to PC +- 32K. If every task had 32K of non-code space above and below it, the chances of corruption of other tasks are minimal, even without an MMU.... Dave E. -Disclaimer- Since my employer doesn't seek my approval of his opinions, I haven't sought his.