mjw@f.gp.cs.cmu.edu.UUCP (04/18/87)
Keywords:
Here's an idea, - no decrease in hardware or software compatability,
just an increase in speed.
Put in a 25Mhz (or what ever you can afford) 68020, and put a chunk of VLSI
cache between it and the buss. This should allow you to speed up without
increasing memory bus bandwidth requirements. It might even decrease them,
allowing faster display processors etc.
One might even think of
caching memory on the other processors, using a write-once caching
consistency scheme. If this is too expensive, maybe forget consistency in
display memory (and hope the results aren't too bad).
Ref for the cheap write-once consistency alg:
[ Goodman 1983 Proc 10th Annual Symp on Comp Arch 1983 ACM
0149-7111/83/0600/0124 pp124..]
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Pity about vdk not being PD. I hope at least it's not going to be too
expensive to use.
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Michael.Witbrock@f.gp.cs.cmu.edu
US Mail: Michael Witbrock
Dept of Computer Science
Carnegie Mellon University
Pittsburgh PA 15213-6890
USA
Telephone : (412) 268 3621 [Office]
(412) 681 3806 [Home]
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[Translated from sign language] ).jmpiazza@sunybcs.UUCP (04/18/87)
In article <46@f.gp.cs.cmu.edu> mjw@f.gp.cs.cmu.edu (Michael Witbrock) writes: > >Here's an idea, ... >Put in a 25Mhz (or what ever you can afford) 68020, If I hear about 68020's one more time I'm gonna scream.